[PATCH] D50018: SystemZ: keep AND masks before SHL i128

[Tom Stellard via Phabricator via llvm-commits]

tstellar added a comment.

In https://reviews.llvm.org/D50018#1181244, @efriedma wrote:

> The transform is wrong whether or not the shift type is legal: ISD::SHL returns poison for out-of-range shifts, just like the IR "shl", and DAGCombine will take advantage of this.


So then our two options are to either combine this to a target specific SHL-like SDNode or select (shl x ( and y, mask)) directly to SystemZ's sll during instruction selection?


Repository:
  rL LLVM

https://reviews.llvm.org/D50018