[PATCH] D49973: [LegalizeDAG] Fix FCOPYSIGN expansion

[Matthias Braun via Phabricator via llvm-commits]

MatzeB accepted this revision.
MatzeB added a comment.
This revision is now accepted and ready to land.

LGTM, nice catch!

- In the future please submit patches with full context to ease review (see https://llvm.org/docs/Phabricator.html#requesting-a-review-via-the-web-interface)



================
Comment at: lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1492-1496
+  EVT ShiftVT = SignBit.getValueSizeInBits() > ClearedSign.getValueSizeInBits() ?
+                IntVT : MagVT;
+  if (SignBit.getValueSizeInBits() < ClearedSign.getValueSizeInBits()) {
+    SignBit = DAG.getNode(ISD::ZERO_EXTEND, DL, MagVT, SignBit);
+  }
----------------
How about using this pattern here (functionality is the same):
```
EVT ShiftVT = IntVT;
if (SignBit.getValueSizeInBits() < ClearedSign.getValueSizeInBits()) {
  SignBit = DAG.getNode(ISD::ZERO_EXTEND, DL, MagVT, SignBit);
  ShiftVT = MagVT;
}
```


Repository:
  rL LLVM

https://reviews.llvm.org/D49973