[llvm] r338268 - Fix uninitialized read in ARM's PrintAsmOperand
Thomas Preud'homme via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 30 09:45:40 PDT 2018
Author: thopre
Date: Mon Jul 30 09:45:40 2018
New Revision: 338268
URL: http://llvm.org/viewvc/llvm-project?rev=338268&view=rev
Log:
Fix uninitialized read in ARM's PrintAsmOperand
Summary:
Fix read of uninitialized RC variable in ARM's PrintAsmOperand when
hasRegClassConstraint returns false. This was causing
inline-asm-operand-implicit-cast test to fail in r338206.
Reviewers: t.p.northover, weimingz, javed.absar, chill
Reviewed By: chill
Subscribers: chill, eraman, kristof.beyls, chrib, llvm-commits
Differential Revision: https://reviews.llvm.org/D49984
Modified:
llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
llvm/trunk/test/CodeGen/ARM/inlineasm-64bit.ll
Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=338268&r1=338267&r2=338268&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Mon Jul 30 09:45:40 2018
@@ -367,8 +367,9 @@ bool ARMAsmPrinter::PrintAsmOperand(cons
unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags);
unsigned RC;
- InlineAsm::hasRegClassConstraint(Flags, RC);
- if (RC == ARM::GPRPairRegClassID) {
+ const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
+ if (InlineAsm::hasRegClassConstraint(Flags, RC) &&
+ ARM::GPRPairRegClass.hasSubClassEq(TRI->getRegClass(RC))) {
if (NumVals != 1)
return true;
const MachineOperand &MO = MI->getOperand(OpNum);
Modified: llvm/trunk/test/CodeGen/ARM/inlineasm-64bit.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/inlineasm-64bit.ll?rev=338268&r1=338267&r2=338268&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/inlineasm-64bit.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/inlineasm-64bit.ll Mon Jul 30 09:45:40 2018
@@ -104,3 +104,11 @@ define i64 @tied_64bit_lookback_test(i64
%res = extractvalue {i64, i32, i64} %vars, 2
ret i64 %res
}
+
+; Check access to low and high part with a specific register pair constraint
+define i64 @low_high_specific_reg_pair(i64 %in) nounwind {
+; CHECK-LABEL: low_high_specific_reg_pair
+; CHECK: mov r3, r2
+ %res = call i64 asm "mov ${0:R}, ${1:Q}", "=&{r2},0"(i64 %in)
+ ret i64 %res
+}
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