[llvm] r338261 - [AArch64][SVE] Asm: Enable instructions to be prefixed.
Sander de Smalen via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 30 09:05:47 PDT 2018
Author: s.desmalen
Date: Mon Jul 30 09:05:45 2018
New Revision: 338261
URL: http://llvm.org/viewvc/llvm-project?rev=338261&view=rev
Log:
[AArch64][SVE] Asm: Enable instructions to be prefixed.
This patch enables instructions that are destructive on their
destination- and first source operand, to be prefixed with a
MOVPRFX instruction.
This patch also adds a variety of tests:
- positive tests for all instructions and forms that accept a
movprfx for either or both predicated and unpredicated forms.
- negative tests for all instructions and forms that do not accept
an unpredicated or predicated movprfx.
- negative tests for the diagnostics that get emitted when a MOVPRFX
instruction is used incorrectly.
This is patch [2/2] in a series to add MOVPRFX instructions:
- Patch [1/2]: https://reviews.llvm.org/D49592
- Patch [2/2]: https://reviews.llvm.org/D49593
Reviewers: rengolin, SjoerdMeijer, samparker, fhahn, javed.absar
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D49593
Added:
llvm/trunk/test/MC/AArch64/SVE/movprfx-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/movprfx.s
llvm/trunk/test/MC/AArch64/SVE/rev-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/sel-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/uqdecp-diagnostics.s
Modified:
llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td
llvm/trunk/test/MC/AArch64/SVE/abs.s
llvm/trunk/test/MC/AArch64/SVE/add-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/add.s
llvm/trunk/test/MC/AArch64/SVE/adr-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/and-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/and.s
llvm/trunk/test/MC/AArch64/SVE/andv-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/asr-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/asr.s
llvm/trunk/test/MC/AArch64/SVE/asrd.s
llvm/trunk/test/MC/AArch64/SVE/asrr.s
llvm/trunk/test/MC/AArch64/SVE/bic-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/bic.s
llvm/trunk/test/MC/AArch64/SVE/clasta-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/clasta.s
llvm/trunk/test/MC/AArch64/SVE/clastb-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/clastb.s
llvm/trunk/test/MC/AArch64/SVE/cls.s
llvm/trunk/test/MC/AArch64/SVE/clz.s
llvm/trunk/test/MC/AArch64/SVE/cmpeq-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/cmpge-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/cmpgt-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/cmphi-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/cmphs-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/cmple-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/cmplo-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/cmpls-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/cmplt-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/cmpne-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/cnot.s
llvm/trunk/test/MC/AArch64/SVE/cnt.s
llvm/trunk/test/MC/AArch64/SVE/compact-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/cpy.s
llvm/trunk/test/MC/AArch64/SVE/decp-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/decp.s
llvm/trunk/test/MC/AArch64/SVE/dup-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/dupm-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/eon-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/eon.s
llvm/trunk/test/MC/AArch64/SVE/eor-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/eor.s
llvm/trunk/test/MC/AArch64/SVE/eorv-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ext-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ext.s
llvm/trunk/test/MC/AArch64/SVE/fabd.s
llvm/trunk/test/MC/AArch64/SVE/fabs.s
llvm/trunk/test/MC/AArch64/SVE/facge-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/facgt-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/facle-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/faclt-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fadd-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fadd.s
llvm/trunk/test/MC/AArch64/SVE/fadda-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/faddv-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fcadd.s
llvm/trunk/test/MC/AArch64/SVE/fcmeq-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fcmge-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fcmgt-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fcmla-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fcmla.s
llvm/trunk/test/MC/AArch64/SVE/fcmle-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fcmlt-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fcmne-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fcmuo-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fcpy.s
llvm/trunk/test/MC/AArch64/SVE/fcvt.s
llvm/trunk/test/MC/AArch64/SVE/fcvtzs.s
llvm/trunk/test/MC/AArch64/SVE/fcvtzu.s
llvm/trunk/test/MC/AArch64/SVE/fdiv.s
llvm/trunk/test/MC/AArch64/SVE/fdivr.s
llvm/trunk/test/MC/AArch64/SVE/fdup-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fexpa-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fmad.s
llvm/trunk/test/MC/AArch64/SVE/fmax.s
llvm/trunk/test/MC/AArch64/SVE/fmaxnm.s
llvm/trunk/test/MC/AArch64/SVE/fmaxnmv-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fmaxv-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fmin.s
llvm/trunk/test/MC/AArch64/SVE/fminnm.s
llvm/trunk/test/MC/AArch64/SVE/fminnmv-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fminv-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fmla-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fmla.s
llvm/trunk/test/MC/AArch64/SVE/fmls-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fmls.s
llvm/trunk/test/MC/AArch64/SVE/fmov-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fmov.s
llvm/trunk/test/MC/AArch64/SVE/fmsb.s
llvm/trunk/test/MC/AArch64/SVE/fmul-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fmul.s
llvm/trunk/test/MC/AArch64/SVE/fmulx.s
llvm/trunk/test/MC/AArch64/SVE/fneg.s
llvm/trunk/test/MC/AArch64/SVE/fnmad.s
llvm/trunk/test/MC/AArch64/SVE/fnmla.s
llvm/trunk/test/MC/AArch64/SVE/fnmls.s
llvm/trunk/test/MC/AArch64/SVE/fnmsb.s
llvm/trunk/test/MC/AArch64/SVE/frecpe-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/frecps-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/frecpx.s
llvm/trunk/test/MC/AArch64/SVE/frinta.s
llvm/trunk/test/MC/AArch64/SVE/frinti.s
llvm/trunk/test/MC/AArch64/SVE/frintm.s
llvm/trunk/test/MC/AArch64/SVE/frintn.s
llvm/trunk/test/MC/AArch64/SVE/frintp.s
llvm/trunk/test/MC/AArch64/SVE/frintx.s
llvm/trunk/test/MC/AArch64/SVE/frintz.s
llvm/trunk/test/MC/AArch64/SVE/frsqrte-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/frsqrts-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fscale.s
llvm/trunk/test/MC/AArch64/SVE/fsqrt.s
llvm/trunk/test/MC/AArch64/SVE/fsub-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/fsub.s
llvm/trunk/test/MC/AArch64/SVE/fsubr.s
llvm/trunk/test/MC/AArch64/SVE/ftmad-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ftmad.s
llvm/trunk/test/MC/AArch64/SVE/ftsmul-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ftssel-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/incd-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/incd.s
llvm/trunk/test/MC/AArch64/SVE/inch-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/inch.s
llvm/trunk/test/MC/AArch64/SVE/incp-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/incp.s
llvm/trunk/test/MC/AArch64/SVE/incw-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/incw.s
llvm/trunk/test/MC/AArch64/SVE/index-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/insr-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/insr.s
llvm/trunk/test/MC/AArch64/SVE/lasta-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/lastb-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1b-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1d-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1h-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1rb-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1rd-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1rh-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1rqb-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1rqd-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1rqh-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1rqw-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1rsb-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1rsh-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1rsw-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1rw-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1sb-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1sh-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1sw-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld1w-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld2b-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld2d-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld2h-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld2w-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld3b-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld3d-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld3h-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld3w-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld4b-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld4d-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld4h-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ld4w-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldff1b-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldff1d-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldff1h-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldff1sb-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldff1sh-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldff1sw-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldff1w-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldnf1b-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldnf1d-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldnf1h-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldnf1sb-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldnf1sh-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldnf1sw-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldnf1w-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldnt1b-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldnt1d-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldnt1h-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/ldnt1w-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/lsl-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/lsl.s
llvm/trunk/test/MC/AArch64/SVE/lslr.s
llvm/trunk/test/MC/AArch64/SVE/lsr-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/lsr.s
llvm/trunk/test/MC/AArch64/SVE/lsrr.s
llvm/trunk/test/MC/AArch64/SVE/mad.s
llvm/trunk/test/MC/AArch64/SVE/mla.s
llvm/trunk/test/MC/AArch64/SVE/mls.s
llvm/trunk/test/MC/AArch64/SVE/mov-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/mov.s
llvm/trunk/test/MC/AArch64/SVE/msb.s
llvm/trunk/test/MC/AArch64/SVE/mul-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/mul.s
llvm/trunk/test/MC/AArch64/SVE/neg.s
llvm/trunk/test/MC/AArch64/SVE/not.s
llvm/trunk/test/MC/AArch64/SVE/orn-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/orn.s
llvm/trunk/test/MC/AArch64/SVE/orr-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/orr.s
llvm/trunk/test/MC/AArch64/SVE/orv-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/prfb-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/prfd-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/prfh-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/prfw-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/rbit.s
llvm/trunk/test/MC/AArch64/SVE/revb.s
llvm/trunk/test/MC/AArch64/SVE/revh.s
llvm/trunk/test/MC/AArch64/SVE/revw.s
llvm/trunk/test/MC/AArch64/SVE/sabd.s
llvm/trunk/test/MC/AArch64/SVE/saddv-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/scvtf.s
llvm/trunk/test/MC/AArch64/SVE/sdiv.s
llvm/trunk/test/MC/AArch64/SVE/sdivr.s
llvm/trunk/test/MC/AArch64/SVE/sdot-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/sdot.s
llvm/trunk/test/MC/AArch64/SVE/smax-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/smax.s
llvm/trunk/test/MC/AArch64/SVE/smaxv-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/smin-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/smin.s
llvm/trunk/test/MC/AArch64/SVE/sminv-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/smulh.s
llvm/trunk/test/MC/AArch64/SVE/splice-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/splice.s
llvm/trunk/test/MC/AArch64/SVE/sqadd-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/sqadd.s
llvm/trunk/test/MC/AArch64/SVE/sqdecd-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/sqdecd.s
llvm/trunk/test/MC/AArch64/SVE/sqdech-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/sqdech.s
llvm/trunk/test/MC/AArch64/SVE/sqdecp-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/sqdecp.s
llvm/trunk/test/MC/AArch64/SVE/sqdecw-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/sqdecw.s
llvm/trunk/test/MC/AArch64/SVE/sqincd-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/sqincd.s
llvm/trunk/test/MC/AArch64/SVE/sqinch-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/sqinch.s
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llvm/trunk/test/MC/AArch64/SVE/sqincp.s
llvm/trunk/test/MC/AArch64/SVE/sqincw-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/sqincw.s
llvm/trunk/test/MC/AArch64/SVE/sqsub-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/sqsub.s
llvm/trunk/test/MC/AArch64/SVE/st1b-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/st1d-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/st1h-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/st1w-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/st2b-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/st2d-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/st2h-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/st2w-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/st3b-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/st3d-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/st3h-diagnostics.s
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llvm/trunk/test/MC/AArch64/SVE/tbl-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/trn1-diagnostics.s
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llvm/trunk/test/MC/AArch64/SVE/ucvtf.s
llvm/trunk/test/MC/AArch64/SVE/udiv.s
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llvm/trunk/test/MC/AArch64/SVE/udot-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/udot.s
llvm/trunk/test/MC/AArch64/SVE/umax-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/umax.s
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llvm/trunk/test/MC/AArch64/SVE/umin-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/umin.s
llvm/trunk/test/MC/AArch64/SVE/uminv-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/umulh.s
llvm/trunk/test/MC/AArch64/SVE/uqadd-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/uqadd.s
llvm/trunk/test/MC/AArch64/SVE/uqdecd-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/uqdecd.s
llvm/trunk/test/MC/AArch64/SVE/uqdech-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/uqdech.s
llvm/trunk/test/MC/AArch64/SVE/uqdecp.s
llvm/trunk/test/MC/AArch64/SVE/uqdecw-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/uqdecw.s
llvm/trunk/test/MC/AArch64/SVE/uqincd-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/uqincd.s
llvm/trunk/test/MC/AArch64/SVE/uqinch-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/uqinch.s
llvm/trunk/test/MC/AArch64/SVE/uqincp-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/uqincp.s
llvm/trunk/test/MC/AArch64/SVE/uqincw-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/uqincw.s
llvm/trunk/test/MC/AArch64/SVE/uqsub-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/uqsub.s
llvm/trunk/test/MC/AArch64/SVE/uunpkhi-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/uunpklo-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/uxtb.s
llvm/trunk/test/MC/AArch64/SVE/uxth.s
llvm/trunk/test/MC/AArch64/SVE/uxtw.s
llvm/trunk/test/MC/AArch64/SVE/uzp1-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/uzp2-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/zip1-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/zip2-diagnostics.s
Modified: llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td Mon Jul 30 09:05:45 2018
@@ -892,40 +892,40 @@ let Predicates = [HasSVE] in {
defm LSR_WIDE_ZPmZ : sve_int_bin_pred_shift_wide<0b001, "lsr">;
defm LSL_WIDE_ZPmZ : sve_int_bin_pred_shift_wide<0b011, "lsl">;
- def FCVT_ZPmZ_StoH : sve_fp_2op_p_zd<0b1001000, "fcvt", ZPR32, ZPR16>;
- def FCVT_ZPmZ_HtoS : sve_fp_2op_p_zd<0b1001001, "fcvt", ZPR16, ZPR32>;
- def SCVTF_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0110010, "scvtf", ZPR16, ZPR16>;
- def SCVTF_ZPmZ_StoS : sve_fp_2op_p_zd<0b1010100, "scvtf", ZPR32, ZPR32>;
- def UCVTF_ZPmZ_StoS : sve_fp_2op_p_zd<0b1010101, "ucvtf", ZPR32, ZPR32>;
- def UCVTF_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0110011, "ucvtf", ZPR16, ZPR16>;
- def FCVTZS_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0111010, "fcvtzs", ZPR16, ZPR16>;
- def FCVTZS_ZPmZ_StoS : sve_fp_2op_p_zd<0b1011100, "fcvtzs", ZPR32, ZPR32>;
- def FCVTZU_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0111011, "fcvtzu", ZPR16, ZPR16>;
- def FCVTZU_ZPmZ_StoS : sve_fp_2op_p_zd<0b1011101, "fcvtzu", ZPR32, ZPR32>;
- def FCVT_ZPmZ_DtoH : sve_fp_2op_p_zd<0b1101000, "fcvt", ZPR64, ZPR16>;
- def FCVT_ZPmZ_HtoD : sve_fp_2op_p_zd<0b1101001, "fcvt", ZPR16, ZPR64>;
- def FCVT_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1101010, "fcvt", ZPR64, ZPR32>;
- def FCVT_ZPmZ_StoD : sve_fp_2op_p_zd<0b1101011, "fcvt", ZPR32, ZPR64>;
- def SCVTF_ZPmZ_StoD : sve_fp_2op_p_zd<0b1110000, "scvtf", ZPR32, ZPR64>;
- def UCVTF_ZPmZ_StoD : sve_fp_2op_p_zd<0b1110001, "ucvtf", ZPR32, ZPR64>;
- def UCVTF_ZPmZ_StoH : sve_fp_2op_p_zd<0b0110101, "ucvtf", ZPR32, ZPR16>;
- def SCVTF_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1110100, "scvtf", ZPR64, ZPR32>;
- def SCVTF_ZPmZ_StoH : sve_fp_2op_p_zd<0b0110100, "scvtf", ZPR32, ZPR16>;
- def SCVTF_ZPmZ_DtoH : sve_fp_2op_p_zd<0b0110110, "scvtf", ZPR64, ZPR16>;
- def UCVTF_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1110101, "ucvtf", ZPR64, ZPR32>;
- def UCVTF_ZPmZ_DtoH : sve_fp_2op_p_zd<0b0110111, "ucvtf", ZPR64, ZPR16>;
- def SCVTF_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1110110, "scvtf", ZPR64, ZPR64>;
- def UCVTF_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1110111, "ucvtf", ZPR64, ZPR64>;
- def FCVTZS_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1111000, "fcvtzs", ZPR64, ZPR32>;
- def FCVTZU_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1111001, "fcvtzu", ZPR64, ZPR32>;
- def FCVTZS_ZPmZ_StoD : sve_fp_2op_p_zd<0b1111100, "fcvtzs", ZPR32, ZPR64>;
- def FCVTZS_ZPmZ_HtoS : sve_fp_2op_p_zd<0b0111100, "fcvtzs", ZPR16, ZPR32>;
- def FCVTZS_ZPmZ_HtoD : sve_fp_2op_p_zd<0b0111110, "fcvtzs", ZPR16, ZPR64>;
- def FCVTZU_ZPmZ_HtoS : sve_fp_2op_p_zd<0b0111101, "fcvtzu", ZPR16, ZPR32>;
- def FCVTZU_ZPmZ_HtoD : sve_fp_2op_p_zd<0b0111111, "fcvtzu", ZPR16, ZPR64>;
- def FCVTZU_ZPmZ_StoD : sve_fp_2op_p_zd<0b1111101, "fcvtzu", ZPR32, ZPR64>;
- def FCVTZS_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1111110, "fcvtzs", ZPR64, ZPR64>;
- def FCVTZU_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1111111, "fcvtzu", ZPR64, ZPR64>;
+ def FCVT_ZPmZ_StoH : sve_fp_2op_p_zd<0b1001000, "fcvt", ZPR32, ZPR16, ElementSizeS>;
+ def FCVT_ZPmZ_HtoS : sve_fp_2op_p_zd<0b1001001, "fcvt", ZPR16, ZPR32, ElementSizeS>;
+ def SCVTF_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0110010, "scvtf", ZPR16, ZPR16, ElementSizeH>;
+ def SCVTF_ZPmZ_StoS : sve_fp_2op_p_zd<0b1010100, "scvtf", ZPR32, ZPR32, ElementSizeS>;
+ def UCVTF_ZPmZ_StoS : sve_fp_2op_p_zd<0b1010101, "ucvtf", ZPR32, ZPR32, ElementSizeS>;
+ def UCVTF_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0110011, "ucvtf", ZPR16, ZPR16, ElementSizeH>;
+ def FCVTZS_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0111010, "fcvtzs", ZPR16, ZPR16, ElementSizeH>;
+ def FCVTZS_ZPmZ_StoS : sve_fp_2op_p_zd<0b1011100, "fcvtzs", ZPR32, ZPR32, ElementSizeS>;
+ def FCVTZU_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0111011, "fcvtzu", ZPR16, ZPR16, ElementSizeH>;
+ def FCVTZU_ZPmZ_StoS : sve_fp_2op_p_zd<0b1011101, "fcvtzu", ZPR32, ZPR32, ElementSizeS>;
+ def FCVT_ZPmZ_DtoH : sve_fp_2op_p_zd<0b1101000, "fcvt", ZPR64, ZPR16, ElementSizeD>;
+ def FCVT_ZPmZ_HtoD : sve_fp_2op_p_zd<0b1101001, "fcvt", ZPR16, ZPR64, ElementSizeD>;
+ def FCVT_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1101010, "fcvt", ZPR64, ZPR32, ElementSizeD>;
+ def FCVT_ZPmZ_StoD : sve_fp_2op_p_zd<0b1101011, "fcvt", ZPR32, ZPR64, ElementSizeD>;
+ def SCVTF_ZPmZ_StoD : sve_fp_2op_p_zd<0b1110000, "scvtf", ZPR32, ZPR64, ElementSizeD>;
+ def UCVTF_ZPmZ_StoD : sve_fp_2op_p_zd<0b1110001, "ucvtf", ZPR32, ZPR64, ElementSizeD>;
+ def UCVTF_ZPmZ_StoH : sve_fp_2op_p_zd<0b0110101, "ucvtf", ZPR32, ZPR16, ElementSizeS>;
+ def SCVTF_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1110100, "scvtf", ZPR64, ZPR32, ElementSizeD>;
+ def SCVTF_ZPmZ_StoH : sve_fp_2op_p_zd<0b0110100, "scvtf", ZPR32, ZPR16, ElementSizeS>;
+ def SCVTF_ZPmZ_DtoH : sve_fp_2op_p_zd<0b0110110, "scvtf", ZPR64, ZPR16, ElementSizeD>;
+ def UCVTF_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1110101, "ucvtf", ZPR64, ZPR32, ElementSizeD>;
+ def UCVTF_ZPmZ_DtoH : sve_fp_2op_p_zd<0b0110111, "ucvtf", ZPR64, ZPR16, ElementSizeD>;
+ def SCVTF_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1110110, "scvtf", ZPR64, ZPR64, ElementSizeD>;
+ def UCVTF_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1110111, "ucvtf", ZPR64, ZPR64, ElementSizeD>;
+ def FCVTZS_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1111000, "fcvtzs", ZPR64, ZPR32, ElementSizeD>;
+ def FCVTZU_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1111001, "fcvtzu", ZPR64, ZPR32, ElementSizeD>;
+ def FCVTZS_ZPmZ_StoD : sve_fp_2op_p_zd<0b1111100, "fcvtzs", ZPR32, ZPR64, ElementSizeD>;
+ def FCVTZS_ZPmZ_HtoS : sve_fp_2op_p_zd<0b0111100, "fcvtzs", ZPR16, ZPR32, ElementSizeS>;
+ def FCVTZS_ZPmZ_HtoD : sve_fp_2op_p_zd<0b0111110, "fcvtzs", ZPR16, ZPR64, ElementSizeD>;
+ def FCVTZU_ZPmZ_HtoS : sve_fp_2op_p_zd<0b0111101, "fcvtzu", ZPR16, ZPR32, ElementSizeS>;
+ def FCVTZU_ZPmZ_HtoD : sve_fp_2op_p_zd<0b0111111, "fcvtzu", ZPR16, ZPR64, ElementSizeD>;
+ def FCVTZU_ZPmZ_StoD : sve_fp_2op_p_zd<0b1111101, "fcvtzu", ZPR32, ZPR64, ElementSizeD>;
+ def FCVTZS_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1111110, "fcvtzs", ZPR64, ZPR64, ElementSizeD>;
+ def FCVTZU_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1111111, "fcvtzu", ZPR64, ZPR64, ElementSizeD>;
defm FRINTN_ZPmZ : sve_fp_2op_p_zd_HSD<0b00000, "frintn">;
defm FRINTP_ZPmZ : sve_fp_2op_p_zd_HSD<0b00001, "frintp">;
Modified: llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td (original)
+++ llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td Mon Jul 30 09:05:45 2018
@@ -421,6 +421,8 @@ class sve_int_count_v<bits<2> sz8_64, bi
let Inst{4-0} = Zdn;
let Constraints = "$Zdn = $_Zdn";
+ let DestructiveInstType = Destructive;
+ let ElementSize = ElementSizeNone;
}
multiclass sve_int_count_v<bits<5> opc, string asm> {
@@ -506,6 +508,8 @@ class sve_int_countvlv<bits<5> opc, stri
let Inst{4-0} = Zdn;
let Constraints = "$Zdn = $_Zdn";
+ let DestructiveInstType = Destructive;
+ let ElementSize = ElementSizeNone;
}
multiclass sve_int_countvlv<bits<5> opc, string asm, ZPRRegOp zprty> {
@@ -811,6 +815,8 @@ class sve_int_perm_insrs<bits<2> sz8_64,
let Inst{4-0} = Zdn;
let Constraints = "$Zdn = $_Zdn";
+ let DestructiveInstType = Destructive;
+ let ElementSize = ElementSizeNone;
}
multiclass sve_int_perm_insrs<string asm> {
@@ -835,6 +841,8 @@ class sve_int_perm_insrv<bits<2> sz8_64,
let Inst{4-0} = Zdn;
let Constraints = "$Zdn = $_Zdn";
+ let DestructiveInstType = Destructive;
+ let ElementSize = ElementSizeNone;
}
multiclass sve_int_perm_insrv<string asm> {
@@ -863,6 +871,8 @@ class sve_int_perm_extract_i<string asm>
let Inst{4-0} = Zdn;
let Constraints = "$Zdn = $_Zdn";
+ let DestructiveInstType = Destructive;
+ let ElementSize = ElementSizeNone;
}
//===----------------------------------------------------------------------===//
@@ -956,6 +966,8 @@ class sve_int_log_imm<bits<2> opc, strin
let Constraints = "$Zdn = $_Zdn";
let DecoderMethod = "DecodeSVELogicalImmInstruction";
+ let DestructiveInstType = Destructive;
+ let ElementSize = ElementSizeNone;
}
multiclass sve_int_log_imm<bits<2> opc, string asm, string alias> {
@@ -1066,6 +1078,8 @@ class sve_fp_2op_i_p_zds<bits<2> sz, bit
let Inst{4-0} = Zdn;
let Constraints = "$Zdn = $_Zdn";
+ let DestructiveInstType = Destructive;
+ let ElementSize = zprty.ElementSize;
}
multiclass sve_fp_2op_i_p_zds<bits<3> opc, string asm, Operand imm_ty> {
@@ -1093,6 +1107,8 @@ class sve_fp_2op_p_zds<bits<2> sz, bits<
let Inst{4-0} = Zdn;
let Constraints = "$Zdn = $_Zdn";
+ let DestructiveInstType = Destructive;
+ let ElementSize = zprty.ElementSize;
}
multiclass sve_fp_2op_p_zds<bits<4> opc, string asm> {
@@ -1118,6 +1134,8 @@ class sve_fp_ftmad<bits<2> sz, string as
let Inst{4-0} = Zdn;
let Constraints = "$Zdn = $_Zdn";
+ let DestructiveInstType = Destructive;
+ let ElementSize = ElementSizeNone;
}
multiclass sve_fp_ftmad<string asm> {
@@ -1179,6 +1197,8 @@ class sve_fp_3op_p_zds_a<bits<2> sz, bit
let Inst{4-0} = Zda;
let Constraints = "$Zda = $_Zda";
+ let DestructiveInstType = Destructive;
+ let ElementSize = zprty.ElementSize;
}
multiclass sve_fp_3op_p_zds_a<bits<2> opc, string asm> {
@@ -1208,6 +1228,8 @@ class sve_fp_3op_p_zds_b<bits<2> sz, bit
let Inst{4-0} = Zdn;
let Constraints = "$Zdn = $_Zdn";
+ let DestructiveInstType = Destructive;
+ let ElementSize = zprty.ElementSize;
}
multiclass sve_fp_3op_p_zds_b<bits<2> opc, string asm> {
@@ -1236,6 +1258,8 @@ class sve_fp_fma_by_indexed_elem<bits<2>
let Inst{4-0} = Zda;
let Constraints = "$Zda = $_Zda";
+ let DestructiveInstType = Destructive;
+ let ElementSize = ElementSizeNone;
}
multiclass sve_fp_fma_by_indexed_elem<bit opc, string asm> {
@@ -1326,6 +1350,8 @@ class sve_fp_fcmla<bits<2> sz, string as
let Inst{4-0} = Zda;
let Constraints = "$Zda = $_Zda";
+ let DestructiveInstType = Destructive;
+ let ElementSize = zprty.ElementSize;
}
multiclass sve_fp_fcmla<string asm> {
@@ -1357,6 +1383,8 @@ class sve_fp_fcmla_by_indexed_elem<bits<
let Inst{4-0} = Zda;
let Constraints = "$Zda = $_Zda";
+ let DestructiveInstType = Destructive;
+ let ElementSize = ElementSizeNone;
}
multiclass sve_fp_fcmla_by_indexed_elem<string asm> {
@@ -1398,6 +1426,8 @@ class sve_fp_fcadd<bits<2> sz, string as
let Inst{4-0} = Zdn;
let Constraints = "$Zdn = $_Zdn";
+ let DestructiveInstType = Destructive;
+ let ElementSize = zprty.ElementSize;
}
multiclass sve_fp_fcadd<string asm> {
@@ -1478,7 +1508,7 @@ multiclass sve_int_perm_bin_perm_zz<bits
//===----------------------------------------------------------------------===//
class sve_fp_2op_p_zd<bits<7> opc, string asm, RegisterOperand i_zprtype,
- RegisterOperand o_zprtype>
+ RegisterOperand o_zprtype, ElementSizeEnum size>
: I<(outs o_zprtype:$Zd), (ins i_zprtype:$_Zd, PPR3bAny:$Pg, i_zprtype:$Zn),
asm, "\t$Zd, $Pg/m, $Zn",
"",
@@ -1496,12 +1526,14 @@ class sve_fp_2op_p_zd<bits<7> opc, strin
let Inst{4-0} = Zd;
let Constraints = "$Zd = $_Zd";
+ let DestructiveInstType = Destructive;
+ let ElementSize = size;
}
multiclass sve_fp_2op_p_zd_HSD<bits<5> opc, string asm> {
- def _H : sve_fp_2op_p_zd<{ 0b01, opc }, asm, ZPR16, ZPR16>;
- def _S : sve_fp_2op_p_zd<{ 0b10, opc }, asm, ZPR32, ZPR32>;
- def _D : sve_fp_2op_p_zd<{ 0b11, opc }, asm, ZPR64, ZPR64>;
+ def _H : sve_fp_2op_p_zd<{ 0b01, opc }, asm, ZPR16, ZPR16, ElementSizeH>;
+ def _S : sve_fp_2op_p_zd<{ 0b10, opc }, asm, ZPR32, ZPR32, ElementSizeS>;
+ def _D : sve_fp_2op_p_zd<{ 0b11, opc }, asm, ZPR64, ZPR64, ElementSizeD>;
}
//===----------------------------------------------------------------------===//
@@ -1553,6 +1585,8 @@ class sve_int_bin_pred_arit_log<bits<2>
let Inst{4-0} = Zdn;
let Constraints = "$Zdn = $_Zdn";
+ let DestructiveInstType = Destructive;
+ let ElementSize = zprty.ElementSize;
}
multiclass sve_int_bin_pred_log<bits<3> opc, string asm> {
@@ -1614,6 +1648,8 @@ class sve_int_mladdsub_vvv_pred<bits<2>
let Inst{4-0} = Zdn;
let Constraints = "$Zdn = $_Zdn";
+ let DestructiveInstType = Destructive;
+ let ElementSize = zprty.ElementSize;
}
multiclass sve_int_mladdsub_vvv_pred<bits<1> opc, string asm> {
@@ -1644,6 +1680,8 @@ class sve_int_mlas_vvv_pred<bits<2> sz8_
let Inst{4-0} = Zda;
let Constraints = "$Zda = $_Zda";
+ let DestructiveInstType = Destructive;
+ let ElementSize = zprty.ElementSize;
}
multiclass sve_int_mlas_vvv_pred<bits<1> opc, string asm> {
@@ -1674,6 +1712,8 @@ class sve_intx_dot<bit sz, bit U, string
let Inst{4-0} = Zda;
let Constraints = "$Zda = $_Zda";
+ let DestructiveInstType = Destructive;
+ let ElementSize = zprty1.ElementSize;
}
multiclass sve_intx_dot<bit opc, string asm> {
@@ -1702,6 +1742,8 @@ class sve_intx_dot_by_indexed_elem<bit s
let Inst{4-0} = Zda;
let Constraints = "$Zda = $_Zda";
+ let DestructiveInstType = Destructive;
+ let ElementSize = ElementSizeNone;
}
multiclass sve_intx_dot_by_indexed_elem<bit opc, string asm> {
@@ -1743,6 +1785,8 @@ class sve_int_un_pred_arit<bits<2> sz8_6
let Inst{4-0} = Zd;
let Constraints = "$Zd = $_Zd";
+ let DestructiveInstType = Destructive;
+ let ElementSize = zprty.ElementSize;
}
multiclass sve_int_un_pred_arit_0<bits<3> opc, string asm> {
@@ -1873,6 +1917,8 @@ class sve_int_arith_imm0<bits<2> sz8_64,
let Inst{4-0} = Zdn;
let Constraints = "$Zdn = $_Zdn";
+ let DestructiveInstType = Destructive;
+ let ElementSize = ElementSizeNone;
}
multiclass sve_int_arith_imm0<bits<3> opc, string asm> {
@@ -1898,6 +1944,8 @@ class sve_int_arith_imm<bits<2> sz8_64,
let Inst{4-0} = Zdn;
let Constraints = "$Zdn = $_Zdn";
+ let DestructiveInstType = Destructive;
+ let ElementSize = ElementSizeNone;
}
multiclass sve_int_arith_imm1<bits<2> opc, string asm, Operand immtype> {
@@ -1958,6 +2006,8 @@ class sve_int_dup_fpimm_pred<bits<2> sz,
let Inst{4-0} = Zd;
let Constraints = "$Zd = $_Zd";
+ let DestructiveInstType = Destructive;
+ let ElementSize = zprty.ElementSize;
}
multiclass sve_int_dup_fpimm_pred<string asm> {
@@ -1990,6 +2040,9 @@ class sve_int_dup_imm_pred<bits<2> sz8_6
let Inst{13} = imm{8}; // sh
let Inst{12-5} = imm{7-0}; // imm8
let Inst{4-0} = Zd;
+
+ let DestructiveInstType = Destructive;
+ let ElementSize = zprty.ElementSize;
}
multiclass sve_int_dup_imm_pred_merge<string asm> {
@@ -2444,9 +2497,9 @@ multiclass sve_int_index_rr<string asm>
//===----------------------------------------------------------------------===//
// SVE Bitwise Shift - Predicated Group
//===----------------------------------------------------------------------===//
-
class sve_int_bin_pred_shift_imm<bits<4> tsz8_64, bits<3> opc, string asm,
- ZPRRegOp zprty, Operand immtype>
+ ZPRRegOp zprty, Operand immtype,
+ ElementSizeEnum size>
: I<(outs zprty:$Zdn), (ins PPR3bAny:$Pg, zprty:$_Zdn, immtype:$imm),
asm, "\t$Zdn, $Pg/m, $_Zdn, $imm",
"",
@@ -2465,31 +2518,41 @@ class sve_int_bin_pred_shift_imm<bits<4>
let Inst{4-0} = Zdn;
let Constraints = "$Zdn = $_Zdn";
+ let DestructiveInstType = Destructive;
+ let ElementSize = size;
}
multiclass sve_int_bin_pred_shift_imm_left<bits<3> opc, string asm> {
- def _B : sve_int_bin_pred_shift_imm<{0,0,0,1}, opc, asm, ZPR8, vecshiftL8>;
- def _H : sve_int_bin_pred_shift_imm<{0,0,1,?}, opc, asm, ZPR16, vecshiftL16> {
+ def _B : sve_int_bin_pred_shift_imm<{0,0,0,1}, opc, asm, ZPR8, vecshiftL8,
+ ElementSizeB>;
+ def _H : sve_int_bin_pred_shift_imm<{0,0,1,?}, opc, asm, ZPR16, vecshiftL16,
+ ElementSizeH> {
let Inst{8} = imm{3};
}
- def _S : sve_int_bin_pred_shift_imm<{0,1,?,?}, opc, asm, ZPR32, vecshiftL32> {
+ def _S : sve_int_bin_pred_shift_imm<{0,1,?,?}, opc, asm, ZPR32, vecshiftL32,
+ ElementSizeS> {
let Inst{9-8} = imm{4-3};
}
- def _D : sve_int_bin_pred_shift_imm<{1,?,?,?}, opc, asm, ZPR64, vecshiftL64> {
+ def _D : sve_int_bin_pred_shift_imm<{1,?,?,?}, opc, asm, ZPR64, vecshiftL64,
+ ElementSizeD> {
let Inst{22} = imm{5};
let Inst{9-8} = imm{4-3};
}
}
multiclass sve_int_bin_pred_shift_imm_right<bits<3> opc, string asm> {
- def _B : sve_int_bin_pred_shift_imm<{0,0,0,1}, opc, asm, ZPR8, vecshiftR8>;
- def _H : sve_int_bin_pred_shift_imm<{0,0,1,?}, opc, asm, ZPR16, vecshiftR16> {
+ def _B : sve_int_bin_pred_shift_imm<{0,0,0,1}, opc, asm, ZPR8, vecshiftR8,
+ ElementSizeB>;
+ def _H : sve_int_bin_pred_shift_imm<{0,0,1,?}, opc, asm, ZPR16, vecshiftR16,
+ ElementSizeH> {
let Inst{8} = imm{3};
}
- def _S : sve_int_bin_pred_shift_imm<{0,1,?,?}, opc, asm, ZPR32, vecshiftR32> {
+ def _S : sve_int_bin_pred_shift_imm<{0,1,?,?}, opc, asm, ZPR32, vecshiftR32,
+ ElementSizeS> {
let Inst{9-8} = imm{4-3};
}
- def _D : sve_int_bin_pred_shift_imm<{1,?,?,?}, opc, asm, ZPR64, vecshiftR64> {
+ def _D : sve_int_bin_pred_shift_imm<{1,?,?,?}, opc, asm, ZPR64, vecshiftR64,
+ ElementSizeD> {
let Inst{22} = imm{5};
let Inst{9-8} = imm{4-3};
}
@@ -2515,6 +2578,8 @@ class sve_int_bin_pred_shift<bits<2> sz8
let Inst{4-0} = Zdn;
let Constraints = "$Zdn = $_Zdn";
+ let DestructiveInstType = Destructive;
+ let ElementSize = zprty.ElementSize;
}
multiclass sve_int_bin_pred_shift<bits<3> opc, string asm> {
@@ -3149,6 +3214,8 @@ class sve_int_perm_clast_zz<bits<2> sz8_
let Inst{4-0} = Zdn;
let Constraints = "$Zdn = $_Zdn";
+ let DestructiveInstType = Destructive;
+ let ElementSize = ElementSizeNone;
}
multiclass sve_int_perm_clast_zz<bit ab, string asm> {
@@ -3226,6 +3293,8 @@ class sve_int_perm_splice<bits<2> sz8_64
let Inst{4-0} = Zdn;
let Constraints = "$Zdn = $_Zdn";
+ let DestructiveInstType = Destructive;
+ let ElementSize = ElementSizeNone;
}
multiclass sve_int_perm_splice<string asm> {
@@ -3254,6 +3323,8 @@ class sve_int_perm_rev<bits<2> sz8_64, b
let Inst{4-0} = Zd;
let Constraints = "$Zd = $_Zd";
+ let DestructiveInstType = Destructive;
+ let ElementSize = zprty.ElementSize;
}
multiclass sve_int_perm_rev_rbit<string asm> {
@@ -3295,6 +3366,8 @@ class sve_int_perm_cpy_r<bits<2> sz8_64,
let Inst{4-0} = Zd;
let Constraints = "$Zd = $_Zd";
+ let DestructiveInstType = Destructive;
+ let ElementSize = zprty.ElementSize;
}
multiclass sve_int_perm_cpy_r<string asm> {
@@ -3330,6 +3403,8 @@ class sve_int_perm_cpy_v<bits<2> sz8_64,
let Inst{4-0} = Zd;
let Constraints = "$Zd = $_Zd";
+ let DestructiveInstType = Destructive;
+ let ElementSize = zprty.ElementSize;
}
multiclass sve_int_perm_cpy_v<string asm> {
@@ -4267,6 +4342,8 @@ class sve_int_movprfx_pred<bits<2> sz8_3
let Inst{12-10} = Pg;
let Inst{9-5} = Zn;
let Inst{4-0} = Zd;
+
+ let ElementSize = zprty.ElementSize;
}
multiclass sve_int_movprfx_pred_merge<bits<3> opc, string asm> {
Modified: llvm/trunk/test/MC/AArch64/SVE/abs.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/abs.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/abs.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/abs.s Mon Jul 30 09:05:45 2018
@@ -54,3 +54,31 @@ abs z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xd6,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf d6 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+abs z4.d, p7/m, z31.d
+// CHECK-INST: abs z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xd6,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf d6 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+abs z4.d, p7/m, z31.d
+// CHECK-INST: abs z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xd6,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf d6 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/add-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/add-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/add-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/add-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -144,3 +144,25 @@ add z0.d, z0.d, #65536
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
// CHECK-NEXT: add z0.d, z0.d, #65536
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+add z31.d, z31.d, #65280
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: add z31.d, z31.d, #65280
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z23.s, p0/z, z30.s
+add z23.s, z13.s, z8.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: add z23.s, z13.s, z8.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z23, z30
+add z23.s, z13.s, z8.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: add z23.s, z13.s, z8.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/add.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/add.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/add.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/add.s Mon Jul 30 09:05:45 2018
@@ -283,3 +283,43 @@ add z31.d, z31.d, #65280
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff ff e0 25 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.b, p7/z, z6.b
+// CHECK-INST: movprfx z4.b, p7/z, z6.b
+// CHECK-ENCODING: [0xc4,0x3c,0x10,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c 10 04 <unknown>
+
+add z4.b, p7/m, z4.b, z31.b
+// CHECK-INST: add z4.b, p7/m, z4.b, z31.b
+// CHECK-ENCODING: [0xe4,0x1f,0x00,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 1f 00 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+add z4.b, p7/m, z4.b, z31.b
+// CHECK-INST: add z4.b, p7/m, z4.b, z31.b
+// CHECK-ENCODING: [0xe4,0x1f,0x00,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 1f 00 04 <unknown>
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+add z31.d, z31.d, #65280
+// CHECK-INST: add z31.d, z31.d, #65280
+// CHECK-ENCODING: [0xff,0xff,0xe0,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff e0 25 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/adr-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/adr-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/adr-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/adr-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -57,3 +57,19 @@ adr z0.d, [z0.d, z0.d, sxtw #4]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #3'
// CHECK-NEXT: adr z0.d, [z0.d, z0.d, sxtw #4]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+adr z0.d, [z0.d, z0.d, sxtw #3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: adr z0.d, [z0.d, z0.d, sxtw #3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+adr z0.d, [z0.d, z0.d, sxtw #3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: adr z0.d, [z0.d, z0.d, sxtw #3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/and-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/and-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/and-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/and-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -92,3 +92,25 @@ and p0.b, p0/m, p1.b, p2.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: and p0.b, p0/m, p1.b, p2.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+and z0.d, z0.d, #0x6
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: and z0.d, z0.d, #0x6
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z23.d, p0/z, z30.d
+and z23.d, z13.d, z8.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: and z23.d, z13.d, z8.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z23, z30
+and z23.d, z13.d, z8.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: and z23.d, z13.d, z8.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/and.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/and.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/and.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/and.s Mon Jul 30 09:05:45 2018
@@ -108,3 +108,43 @@ and p15.b, p15/z, p15.b, p15.b
// CHECK-ENCODING: [0xef,0x7d,0x0f,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ef 7d 0f 25 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+and z4.d, p7/m, z4.d, z31.d
+// CHECK-INST: and z4.d, p7/m, z4.d, z31.d
+// CHECK-ENCODING: [0xe4,0x1f,0xda,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 1f da 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+and z4.d, p7/m, z4.d, z31.d
+// CHECK-INST: and z4.d, p7/m, z4.d, z31.d
+// CHECK-ENCODING: [0xe4,0x1f,0xda,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 1f da 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+and z0.d, z0.d, #0x6
+// CHECK-INST: and z0.d, z0.d, #0x6
+// CHECK-ENCODING: [0x20,0xf8,0x83,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 f8 83 05 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/andv-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/andv-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/andv-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/andv-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -31,4 +31,19 @@ andv v0.2d, p7, z31.d
andv h0, p8, z31.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: andv h0, p8, z31.h
-// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
\ No newline at end of file
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+andv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: andv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+andv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: andv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/asr-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/asr-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/asr-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/asr-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -122,3 +122,31 @@ asr z0.b, p8/m, z0.b, z1.b
// CHECK-NEXT: asr z0.b, p8/m, z0.b, z1.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+asr z31.d, z31.d, #64
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: asr z31.d, z31.d, #64
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+asr z31.d, z31.d, #64
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: asr z31.d, z31.d, #64
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+asr z0.s, z1.s, z2.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: asr z0.s, z1.s, z2.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+asr z0.s, z1.s, z2.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: asr z0.s, z1.s, z2.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/asr.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/asr.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/asr.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/asr.s Mon Jul 30 09:05:45 2018
@@ -162,3 +162,55 @@ asr z0.s, z1.s, z2.d
// CHECK-ENCODING: [0x20,0x80,0xa2,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 20 80 a2 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z31.d, p0/z, z6.d
+// CHECK-INST: movprfx z31.d, p0/z, z6.d
+// CHECK-ENCODING: [0xdf,0x20,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df 20 d0 04 <unknown>
+
+asr z31.d, p0/m, z31.d, #64
+// CHECK-INST: asr z31.d, p0/m, z31.d, #64
+// CHECK-ENCODING: [0x1f,0x80,0x80,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 1f 80 80 04 <unknown>
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+asr z31.d, p0/m, z31.d, #64
+// CHECK-INST: asr z31.d, p0/m, z31.d, #64
+// CHECK-ENCODING: [0x1f,0x80,0x80,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 1f 80 80 04 <unknown>
+
+movprfx z0.s, p0/z, z7.s
+// CHECK-INST: movprfx z0.s, p0/z, z7.s
+// CHECK-ENCODING: [0xe0,0x20,0x90,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 20 90 04 <unknown>
+
+asr z0.s, p0/m, z0.s, z1.d
+// CHECK-INST: asr z0.s, p0/m, z0.s, z1.d
+// CHECK-ENCODING: [0x20,0x80,0x98,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 80 98 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+asr z0.s, p0/m, z0.s, z1.d
+// CHECK-INST: asr z0.s, p0/m, z0.s, z1.d
+// CHECK-ENCODING: [0x20,0x80,0x98,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 80 98 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/asrd.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/asrd.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/asrd.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/asrd.s Mon Jul 30 09:05:45 2018
@@ -54,3 +54,31 @@ asrd z31.d, p0/m, z31.d, #64
// CHECK-ENCODING: [0x1f,0x80,0x84,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 1f 80 84 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z31.d, p0/z, z6.d
+// CHECK-INST: movprfx z31.d, p0/z, z6.d
+// CHECK-ENCODING: [0xdf,0x20,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df 20 d0 04 <unknown>
+
+asrd z31.d, p0/m, z31.d, #64
+// CHECK-INST: asrd z31.d, p0/m, z31.d, #64
+// CHECK-ENCODING: [0x1f,0x80,0x84,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 1f 80 84 04 <unknown>
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+asrd z31.d, p0/m, z31.d, #64
+// CHECK-INST: asrd z31.d, p0/m, z31.d, #64
+// CHECK-ENCODING: [0x1f,0x80,0x84,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 1f 80 84 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/asrr.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/asrr.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/asrr.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/asrr.s Mon Jul 30 09:05:45 2018
@@ -30,3 +30,31 @@ asrr z0.d, p0/m, z0.d, z0.d
// CHECK-ENCODING: [0x00,0x80,0xd4,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 00 80 d4 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z5.d, p0/z, z7.d
+// CHECK-INST: movprfx z5.d, p0/z, z7.d
+// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e5 20 d0 04 <unknown>
+
+asrr z5.d, p0/m, z5.d, z0.d
+// CHECK-INST: asrr z5.d, p0/m, z5.d, z0.d
+// CHECK-ENCODING: [0x05,0x80,0xd4,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 80 d4 04 <unknown>
+
+movprfx z5, z7
+// CHECK-INST: movprfx z5, z7
+// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e5 bc 20 04 <unknown>
+
+asrr z5.d, p0/m, z5.d, z0.d
+// CHECK-INST: asrr z5.d, p0/m, z5.d, z0.d
+// CHECK-ENCODING: [0x05,0x80,0xd4,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 80 d4 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/bic-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/bic-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/bic-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/bic-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -92,3 +92,25 @@ bic p0.b, p0/m, p1.b, p2.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: bic p0.b, p0/m, p1.b, p2.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+bic z0.d, z0.d, #0x6
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: bic z0.d, z0.d, #0x6
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z23.d, p0/z, z30.d
+bic z23.d, z13.d, z8.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: bic z23.d, z13.d, z8.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z23, z30
+bic z23.d, z13.d, z8.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: bic z23.d, z13.d, z8.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/bic.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/bic.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/bic.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/bic.s Mon Jul 30 09:05:45 2018
@@ -102,3 +102,43 @@ bic p0.b, p0/z, p0.b, p0.b
// CHECK-ENCODING: [0x10,0x40,0x00,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 10 40 00 25 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+bic z4.d, p7/m, z4.d, z31.d
+// CHECK-INST: bic z4.d, p7/m, z4.d, z31.d
+// CHECK-ENCODING: [0xe4,0x1f,0xdb,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 1f db 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+bic z4.d, p7/m, z4.d, z31.d
+// CHECK-INST: bic z4.d, p7/m, z4.d, z31.d
+// CHECK-ENCODING: [0xe4,0x1f,0xdb,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 1f db 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+bic z0.d, z0.d, #0x6
+// CHECK-INST: and z0.d, z0.d, #0xfffffffffffffff9
+// CHECK-ENCODING: [0xa0,0xef,0x83,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: a0 ef 83 05 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/clasta-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/clasta-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/clasta-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/clasta-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -77,3 +77,37 @@ clasta z0.d, p7, z0.d, z31.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: clasta z0.d, p7, z0.d, z31.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+clasta x0, p7, x0, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: clasta x0, p7, x0, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+clasta x0, p7, x0, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: clasta x0, p7, x0, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31.d, p7/z, z6.d
+clasta d0, p7, d0, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: clasta d0, p7, d0, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+clasta d0, p7, d0, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: clasta d0, p7, d0, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p7/z, z7.d
+clasta z0.d, p7, z0.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: clasta z0.d, p7, z0.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/clasta.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/clasta.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/clasta.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/clasta.s Mon Jul 30 09:05:45 2018
@@ -78,3 +78,19 @@ clasta z0.d, p7, z0.d, z31.d
// CHECK-ENCODING: [0xe0,0x9f,0xe8,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 9f e8 05 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+clasta z0.d, p7, z0.d, z31.d
+// CHECK-INST: clasta z0.d, p7, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xe8,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f e8 05 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/clastb-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/clastb-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/clastb-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/clastb-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -77,3 +77,37 @@ clastb z0.d, p7, z0.d, z31.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: clastb z0.d, p7, z0.d, z31.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+clastb x0, p7, x0, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: clastb x0, p7, x0, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+clastb x0, p7, x0, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: clastb x0, p7, x0, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31.d, p7/z, z6.d
+clastb d0, p7, d0, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: clastb d0, p7, d0, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+clastb d0, p7, d0, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: clastb d0, p7, d0, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p7/z, z7.d
+clastb z0.d, p7, z0.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: clastb z0.d, p7, z0.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/clastb.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/clastb.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/clastb.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/clastb.s Mon Jul 30 09:05:45 2018
@@ -78,3 +78,19 @@ clastb z0.d, p7, z0.d, z31.d
// CHECK-ENCODING: [0xe0,0x9f,0xe9,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 9f e9 05 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+clastb z0.d, p7, z0.d, z31.d
+// CHECK-INST: clastb z0.d, p7, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xe9,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f e9 05 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/cls.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/cls.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/cls.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/cls.s Mon Jul 30 09:05:45 2018
@@ -30,3 +30,31 @@ cls z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xd8,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf d8 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+cls z4.d, p7/m, z31.d
+// CHECK-INST: cls z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xd8,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf d8 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+cls z4.d, p7/m, z31.d
+// CHECK-INST: cls z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xd8,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf d8 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/clz.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/clz.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/clz.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/clz.s Mon Jul 30 09:05:45 2018
@@ -30,3 +30,31 @@ clz z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xd9,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf d9 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+clz z4.d, p7/m, z31.d
+// CHECK-INST: clz z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xd9,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf d9 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+clz z4.d, p7/m, z31.d
+// CHECK-INST: clz z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xd9,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf d9 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/cmpeq-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/cmpeq-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/cmpeq-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/cmpeq-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -74,3 +74,31 @@ cmpeq p0.s, p0/z, z0.s, #16
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-16, 15].
// CHECK-NEXT: cmpeq p0.s, p0/z, z0.s, #16
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+cmpeq p0.d, p0/z, z0.d, #15
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmpeq p0.d, p0/z, z0.d, #15
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+cmpeq p0.d, p0/z, z0.d, #15
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmpeq p0.d, p0/z, z0.d, #15
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+cmpeq p0.s, p0/z, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmpeq p0.s, p0/z, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+cmpeq p0.s, p0/z, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmpeq p0.s, p0/z, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/cmpge-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/cmpge-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/cmpge-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/cmpge-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -74,3 +74,31 @@ cmpge p0.s, p0/z, z0.s, #16
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-16, 15].
// CHECK-NEXT: cmpge p0.s, p0/z, z0.s, #16
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+cmpge p0.d, p0/z, z0.d, #15
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmpge p0.d, p0/z, z0.d, #15
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+cmpge p0.d, p0/z, z0.d, #15
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmpge p0.d, p0/z, z0.d, #15
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+cmpge p0.s, p0/z, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmpge p0.s, p0/z, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+cmpge p0.s, p0/z, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmpge p0.s, p0/z, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/cmpgt-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/cmpgt-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/cmpgt-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/cmpgt-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -74,3 +74,31 @@ cmpgt p0.s, p0/z, z0.s, #16
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-16, 15].
// CHECK-NEXT: cmpgt p0.s, p0/z, z0.s, #16
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+cmpgt p0.d, p0/z, z0.d, #15
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmpgt p0.d, p0/z, z0.d, #15
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+cmpgt p0.d, p0/z, z0.d, #15
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmpgt p0.d, p0/z, z0.d, #15
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+cmpgt p0.s, p0/z, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmpgt p0.s, p0/z, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+cmpgt p0.s, p0/z, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmpgt p0.s, p0/z, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/cmphi-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/cmphi-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/cmphi-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/cmphi-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -74,3 +74,31 @@ cmphi p0.s, p0/z, z0.s, #128
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 127].
// CHECK-NEXT: cmphi p0.s, p0/z, z0.s, #128
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+cmphi p0.d, p0/z, z0.d, #127
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmphi p0.d, p0/z, z0.d, #127
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+cmphi p0.d, p0/z, z0.d, #127
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmphi p0.d, p0/z, z0.d, #127
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+cmphi p0.s, p0/z, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmphi p0.s, p0/z, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+cmphi p0.s, p0/z, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmphi p0.s, p0/z, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/cmphs-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/cmphs-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/cmphs-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/cmphs-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -74,3 +74,31 @@ cmphs p0.s, p0/z, z0.s, #128
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 127].
// CHECK-NEXT: cmphs p0.s, p0/z, z0.s, #128
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+cmphs p0.d, p0/z, z0.d, #127
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmphs p0.d, p0/z, z0.d, #127
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+cmphs p0.d, p0/z, z0.d, #127
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmphs p0.d, p0/z, z0.d, #127
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+cmphs p0.s, p0/z, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmphs p0.s, p0/z, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+cmphs p0.s, p0/z, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmphs p0.s, p0/z, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/cmple-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/cmple-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/cmple-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/cmple-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -74,3 +74,31 @@ cmple p0.s, p0/z, z0.s, #16
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-16, 15].
// CHECK-NEXT: cmple p0.s, p0/z, z0.s, #16
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+cmple p0.d, p0/z, z0.d, #15
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmple p0.d, p0/z, z0.d, #15
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+cmple p0.d, p0/z, z0.d, #15
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmple p0.d, p0/z, z0.d, #15
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+cmple p0.s, p0/z, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmple p0.s, p0/z, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+cmple p0.s, p0/z, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmple p0.s, p0/z, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/cmplo-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/cmplo-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/cmplo-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/cmplo-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -74,3 +74,31 @@ cmplo p0.s, p0/z, z0.s, #128
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 127].
// CHECK-NEXT: cmplo p0.s, p0/z, z0.s, #128
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+cmplo p0.d, p0/z, z0.d, #127
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmplo p0.d, p0/z, z0.d, #127
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+cmplo p0.d, p0/z, z0.d, #127
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmplo p0.d, p0/z, z0.d, #127
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+cmplo p0.s, p0/z, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmplo p0.s, p0/z, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+cmplo p0.s, p0/z, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmplo p0.s, p0/z, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/cmpls-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/cmpls-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/cmpls-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/cmpls-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -74,3 +74,31 @@ cmpls p0.s, p0/z, z0.s, #128
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 127].
// CHECK-NEXT: cmpls p0.s, p0/z, z0.s, #128
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+cmpls p0.d, p0/z, z0.d, #127
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmpls p0.d, p0/z, z0.d, #127
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+cmpls p0.d, p0/z, z0.d, #127
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmpls p0.d, p0/z, z0.d, #127
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+cmpls p0.s, p0/z, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmpls p0.s, p0/z, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+cmpls p0.s, p0/z, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmpls p0.s, p0/z, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/cmplt-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/cmplt-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/cmplt-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/cmplt-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -74,3 +74,31 @@ cmplt p0.s, p0/z, z0.s, #16
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-16, 15].
// CHECK-NEXT: cmplt p0.s, p0/z, z0.s, #16
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+cmplt p0.d, p0/z, z0.d, #15
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmplt p0.d, p0/z, z0.d, #15
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+cmplt p0.d, p0/z, z0.d, #15
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmplt p0.d, p0/z, z0.d, #15
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+cmplt p0.s, p0/z, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmplt p0.s, p0/z, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+cmplt p0.s, p0/z, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmplt p0.s, p0/z, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/cmpne-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/cmpne-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/cmpne-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/cmpne-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -74,3 +74,31 @@ cmpne p0.s, p0/z, z0.s, #16
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-16, 15].
// CHECK-NEXT: cmpne p0.s, p0/z, z0.s, #16
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+cmpne p0.d, p0/z, z0.d, #15
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmpne p0.d, p0/z, z0.d, #15
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+cmpne p0.d, p0/z, z0.d, #15
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmpne p0.d, p0/z, z0.d, #15
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+cmpne p0.s, p0/z, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmpne p0.s, p0/z, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+cmpne p0.s, p0/z, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: cmpne p0.s, p0/z, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/cnot.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/cnot.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/cnot.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/cnot.s Mon Jul 30 09:05:45 2018
@@ -30,3 +30,31 @@ cnot z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xdb,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf db 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+cnot z4.d, p7/m, z31.d
+// CHECK-INST: cnot z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xdb,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf db 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+cnot z4.d, p7/m, z31.d
+// CHECK-INST: cnot z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xdb,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf db 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/cnt.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/cnt.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/cnt.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/cnt.s Mon Jul 30 09:05:45 2018
@@ -30,3 +30,31 @@ cnt z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xda,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf da 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+cnt z4.d, p7/m, z31.d
+// CHECK-INST: cnt z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xda,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf da 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+cnt z4.d, p7/m, z31.d
+// CHECK-INST: cnt z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xda,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf da 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/compact-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/compact-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/compact-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/compact-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -26,3 +26,19 @@ compact z31.h, p7, z31.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: compact z31.h, p7, z31.h
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+compact z31.d, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: compact z31.d, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+compact z31.d, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: compact z31.d, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/cpy.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/cpy.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/cpy.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/cpy.s Mon Jul 30 09:05:45 2018
@@ -275,3 +275,79 @@ cpy z21.d, p15/m, #-128, lsl #8
// CHECK-ENCODING: [0x15,0x70,0xdf,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 15 70 df 05 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z31.d, p7/z, z6.d
+// CHECK-INST: movprfx z31.d, p7/z, z6.d
+// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df 3c d0 04 <unknown>
+
+cpy z31.d, p7/m, sp
+// CHECK-INST: mov z31.d, p7/m, sp
+// CHECK-ENCODING: [0xff,0xbf,0xe8,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff bf e8 05 <unknown>
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+cpy z31.d, p7/m, sp
+// CHECK-INST: mov z31.d, p7/m, sp
+// CHECK-ENCODING: [0xff,0xbf,0xe8,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff bf e8 05 <unknown>
+
+movprfx z21.d, p7/z, z28.d
+// CHECK-INST: movprfx z21.d, p7/z, z28.d
+// CHECK-ENCODING: [0x95,0x3f,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 95 3f d0 04 <unknown>
+
+cpy z21.d, p7/m, #-128, lsl #8
+// CHECK-INST: mov z21.d, p7/m, #-32768
+// CHECK-ENCODING: [0x15,0x70,0xd7,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 15 70 d7 05 <unknown>
+
+movprfx z21, z28
+// CHECK-INST: movprfx z21, z28
+// CHECK-ENCODING: [0x95,0xbf,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 95 bf 20 04 <unknown>
+
+cpy z21.d, p15/m, #-128, lsl #8
+// CHECK-INST: mov z21.d, p15/m, #-32768
+// CHECK-ENCODING: [0x15,0x70,0xdf,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 15 70 df 05 <unknown>
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+cpy z4.d, p7/m, d31
+// CHECK-INST: mov z4.d, p7/m, d31
+// CHECK-ENCODING: [0xe4,0x9f,0xe0,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 9f e0 05 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+cpy z4.d, p7/m, d31
+// CHECK-INST: mov z4.d, p7/m, d31
+// CHECK-ENCODING: [0xe4,0x9f,0xe0,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 9f e0 05 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/decp-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/decp-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/decp-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/decp-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -36,3 +36,13 @@ decp x0, p0.q
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
// CHECK-NEXT: decp x0, p0.q
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+decp z31.d, p7
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: decp z31.d, p7
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/decp.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/decp.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/decp.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/decp.s Mon Jul 30 09:05:45 2018
@@ -72,3 +72,19 @@ decp z31.d, p15
// CHECK-ENCODING: [0xff,0x81,0xed,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 81 ed 25 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+decp z31.d, p15
+// CHECK-INST: decp z31.d, p15
+// CHECK-ENCODING: [0xff,0x81,0xed,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 81 ed 25 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/dup-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/dup-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/dup-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/dup-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -215,3 +215,43 @@ dup z24.q, z21.q[4]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
// CHECK-NEXT: dup z24.q, z21.q[4]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.b, p0/z, z6.b
+dup z31.b, wsp
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: dup z31.b, wsp
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+dup z31.b, wsp
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: dup z31.b, wsp
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21.d, p0/z, z28.d
+dup z21.d, #32512
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: dup z21.d, #32512
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+dup z21.d, #32512
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: dup z21.d, #32512
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31.d, p0/z, z6.d
+dup z31.d, z31.d[7]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: dup z31.d, z31.d[7]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+dup z31.d, z31.d[7]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: dup z31.d, z31.d[7]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/dupm-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/dupm-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/dupm-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/dupm-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -37,3 +37,19 @@ dupm z15.d, #0xfffffffffffffffa
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected compatible register or logical immediate
// CHECK-NEXT: dupm z15.d, #0xfffffffffffffffa
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+dupm z0.d, #0xfffffffffffffff9
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: dupm z0.d, #0xfffffffffffffff9
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+dupm z0.d, #0xfffffffffffffff9
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: dupm z0.d, #0xfffffffffffffff9
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/eon-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/eon-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/eon-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/eon-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -50,3 +50,13 @@ eon z7.d, z8.d, #254
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
// CHECK-NEXT: eon z7.d, z8.d, #254
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+eon z0.d, z0.d, #0x6
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: eon z0.d, z0.d, #0x6
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/eon.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/eon.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/eon.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/eon.s Mon Jul 30 09:05:45 2018
@@ -54,3 +54,19 @@ eon z0.d, z0.d, #0x6
// CHECK-ENCODING: [0xa0,0xef,0x43,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: a0 ef 43 05 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+eon z0.d, z0.d, #0x6
+// CHECK-INST: eor z0.d, z0.d, #0xfffffffffffffff9
+// CHECK-ENCODING: [0xa0,0xef,0x43,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: a0 ef 43 05 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/eor-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/eor-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/eor-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/eor-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -92,3 +92,25 @@ eor p0.b, p0/m, p1.b, p2.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: eor p0.b, p0/m, p1.b, p2.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+eor z0.d, z0.d, #0x6
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: eor z0.d, z0.d, #0x6
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+eor z0.d, z0.d, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: eor z0.d, z0.d, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+eor z0.d, z0.d, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: eor z0.d, z0.d, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/eor.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/eor.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/eor.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/eor.s Mon Jul 30 09:05:45 2018
@@ -108,3 +108,43 @@ eor p15.b, p15/z, p15.b, p15.b
// CHECK-ENCODING: [0xef,0x7f,0x0f,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ef 7f 0f 25 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.b, p7/z, z6.b
+// CHECK-INST: movprfx z4.b, p7/z, z6.b
+// CHECK-ENCODING: [0xc4,0x3c,0x10,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c 10 04 <unknown>
+
+eor z4.b, p7/m, z4.b, z31.b
+// CHECK-INST: eor z4.b, p7/m, z4.b, z31.b
+// CHECK-ENCODING: [0xe4,0x1f,0x19,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 1f 19 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+eor z4.b, p7/m, z4.b, z31.b
+// CHECK-INST: eor z4.b, p7/m, z4.b, z31.b
+// CHECK-ENCODING: [0xe4,0x1f,0x19,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 1f 19 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+eor z0.d, z0.d, #0x6
+// CHECK-INST: eor z0.d, z0.d, #0x6
+// CHECK-ENCODING: [0x20,0xf8,0x43,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 f8 43 05 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/eorv-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/eorv-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/eorv-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/eorv-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -31,4 +31,19 @@ eorv v0.2d, p7, z31.d
eorv h0, p8, z31.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: eorv h0, p8, z31.h
-// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
\ No newline at end of file
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+eorv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: eorv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+eorv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: eorv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ext-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ext-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ext-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ext-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -31,3 +31,13 @@ ext z0.b, z0.b, z1.b, #256
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255].
// CHECK-NEXT: ext z0.b, z0.b, z1.b, #256
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.b, p0/z, z6.b
+ext z31.b, z31.b, z0.b, #255
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: ext z31.b, z31.b, z0.b, #255
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ext.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ext.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ext.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ext.s Mon Jul 30 09:05:45 2018
@@ -18,3 +18,19 @@ ext z31.b, z31.b, z0.b, #255
// CHECK-ENCODING: [0x1f,0x1c,0x3f,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 1f 1c 3f 05 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+ext z31.b, z31.b, z0.b, #255
+// CHECK-INST: ext z31.b, z31.b, z0.b, #255
+// CHECK-ENCODING: [0x1f,0x1c,0x3f,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 1f 1c 3f 05 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fabd.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fabd.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fabd.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fabd.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ fabd z0.d, p7/m, z0.d, z31.d
// CHECK-ENCODING: [0xe0,0x9f,0xc8,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 9f c8 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+fabd z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fabd z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xc8,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f c8 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fabd z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fabd z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xc8,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f c8 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fabs.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fabs.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fabs.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fabs.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ fabs z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xdc,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf dc 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+fabs z4.d, p7/m, z31.d
+// CHECK-INST: fabs z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xdc,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf dc 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+fabs z4.d, p7/m, z31.d
+// CHECK-INST: fabs z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xdc,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf dc 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/facge-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/facge-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/facge-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/facge-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -9,3 +9,19 @@ facge p0.b, p0/z, z0.b, #0.0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unexpected floating point literal
// CHECK-NEXT: facge p0.b, p0/z, z0.b, #0.0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+facge p0.d, p0/z, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: facge p0.d, p0/z, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+facge p0.d, p0/z, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: facge p0.d, p0/z, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/facgt-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/facgt-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/facgt-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/facgt-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -9,3 +9,19 @@ facgt p0.b, p0/z, z0.b, #0.0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unexpected floating point literal
// CHECK-NEXT: facgt p0.b, p0/z, z0.b, #0.0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+facgt p0.d, p0/z, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: facgt p0.d, p0/z, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+facgt p0.d, p0/z, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: facgt p0.d, p0/z, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/facle-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/facle-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/facle-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/facle-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -9,3 +9,19 @@ facle p0.b, p0/z, z0.b, #0.0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unexpected floating point literal
// CHECK-NEXT: facle p0.b, p0/z, z0.b, #0.0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+facle p0.d, p0/z, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: facle p0.d, p0/z, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+facle p0.d, p0/z, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: facle p0.d, p0/z, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/faclt-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/faclt-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/faclt-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/faclt-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -9,3 +9,19 @@ faclt p0.b, p0/z, z0.b, #0.0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unexpected floating point literal
// CHECK-NEXT: faclt p0.b, p0/z, z0.b, #0.0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+faclt p0.d, p0/z, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: faclt p0.d, p0/z, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+faclt p0.d, p0/z, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: faclt p0.d, p0/z, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fadd-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fadd-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fadd-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fadd-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -68,3 +68,19 @@ fadd z0.h, p8/m, z0.h, z31.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: fadd z0.h, p8/m, z0.h, z31.h
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+fadd z0.d, z1.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fadd z0.d, z1.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+fadd z0.d, z1.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fadd z0.d, z1.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fadd.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fadd.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fadd.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fadd.s Mon Jul 30 09:05:45 2018
@@ -90,3 +90,55 @@ fadd z0.d, z1.d, z31.d
// CHECK-ENCODING: [0x20,0x00,0xdf,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 20 00 df 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z31.d, p7/z, z6.d
+// CHECK-INST: movprfx z31.d, p7/z, z6.d
+// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df 3c d0 04 <unknown>
+
+fadd z31.d, p7/m, z31.d, #1.0
+// CHECK-INST: fadd z31.d, p7/m, z31.d, #1.0
+// CHECK-ENCODING: [0x3f,0x9c,0xd8,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 3f 9c d8 65 <unknown>
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+fadd z31.d, p7/m, z31.d, #1.0
+// CHECK-INST: fadd z31.d, p7/m, z31.d, #1.0
+// CHECK-ENCODING: [0x3f,0x9c,0xd8,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 3f 9c d8 65 <unknown>
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+fadd z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fadd z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xc0,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f c0 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fadd z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fadd z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xc0,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f c0 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fadda-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fadda-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fadda-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fadda-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -18,4 +18,19 @@ fadda h0, p8, h0, z31.h
fadda v0.8h, p7, v0.8h, z31.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: fadda v0.8h, p7, v0.8h, z31.h
-// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
\ No newline at end of file
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+fadda d0, p7, d0, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fadda d0, p7, d0, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+fadda d0, p7, d0, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fadda d0, p7, d0, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/faddv-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/faddv-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/faddv-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/faddv-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -17,4 +17,19 @@ faddv h0, p8, z31.h
faddv v0, p7, z31.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: faddv v0, p7, z31.h
-// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
\ No newline at end of file
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+faddv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: faddv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+faddv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: faddv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fcadd.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fcadd.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fcadd.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fcadd.s Mon Jul 30 09:05:45 2018
@@ -42,3 +42,31 @@ fcadd z31.d, p7/m, z31.d, z31.d, #270
// CHECK-ENCODING: [0xff,0x9f,0xc1,0x64]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 9f c1 64 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+fcadd z4.d, p7/m, z4.d, z31.d, #270
+// CHECK-INST: fcadd z4.d, p7/m, z4.d, z31.d, #270
+// CHECK-ENCODING: [0xe4,0x9f,0xc1,0x64]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 9f c1 64 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+fcadd z4.d, p7/m, z4.d, z31.d, #270
+// CHECK-INST: fcadd z4.d, p7/m, z4.d, z31.d, #270
+// CHECK-ENCODING: [0xe4,0x9f,0xc1,0x64]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 9f c1 64 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fcmeq-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fcmeq-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fcmeq-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fcmeq-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -9,3 +9,31 @@ fcmeq p0.s, p0/z, z0.s, #1.0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0
// CHECK-NEXT: fcmeq p0.s, p0/z, z0.s, #1.0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+fcmeq p0.d, p0/z, z0.d, #0.0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmeq p0.d, p0/z, z0.d, #0.0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+fcmeq p0.d, p0/z, z0.d, #0.0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmeq p0.d, p0/z, z0.d, #0.0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+fcmeq p0.d, p0/z, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmeq p0.d, p0/z, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+fcmeq p0.d, p0/z, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmeq p0.d, p0/z, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fcmge-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fcmge-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fcmge-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fcmge-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -9,3 +9,31 @@ fcmge p0.s, p0/z, z0.s, #1.0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0
// CHECK-NEXT: fcmge p0.s, p0/z, z0.s, #1.0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+fcmge p0.d, p0/z, z0.d, #0.0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmge p0.d, p0/z, z0.d, #0.0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+fcmge p0.d, p0/z, z0.d, #0.0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmge p0.d, p0/z, z0.d, #0.0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+fcmge p0.d, p0/z, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmge p0.d, p0/z, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+fcmge p0.d, p0/z, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmge p0.d, p0/z, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fcmgt-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fcmgt-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fcmgt-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fcmgt-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -9,3 +9,31 @@ fcmgt p0.s, p0/z, z0.s, #1.0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0
// CHECK-NEXT: fcmgt p0.s, p0/z, z0.s, #1.0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+fcmgt p0.d, p0/z, z0.d, #0.0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmgt p0.d, p0/z, z0.d, #0.0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+fcmgt p0.d, p0/z, z0.d, #0.0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmgt p0.d, p0/z, z0.d, #0.0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+fcmgt p0.d, p0/z, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmgt p0.d, p0/z, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+fcmgt p0.d, p0/z, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmgt p0.d, p0/z, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fcmla-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fcmla-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fcmla-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fcmla-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -50,3 +50,13 @@ fcmla z0.d, z1.d, z2.d[0], #0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: fcmla z0.d, z1.d, z2.d[0], #0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.s, p0/z, z28.s
+fcmla z21.s, z10.s, z5.s[1], #90
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: fcmla z21.s, z10.s, z5.s[1], #90
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fcmla.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fcmla.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fcmla.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fcmla.s Mon Jul 30 09:05:45 2018
@@ -102,3 +102,43 @@ fcmla z21.s, z10.s, z5.s[1], #90
// CHECK-ENCODING: [0x55,0x15,0xf5,0x64]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 55 15 f5 64 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+fcmla z4.d, p7/m, z31.d, z31.d, #270
+// CHECK-INST: fcmla z4.d, p7/m, z31.d, z31.d, #270
+// CHECK-ENCODING: [0xe4,0x7f,0xdf,0x64]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 7f df 64 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+fcmla z4.d, p7/m, z31.d, z31.d, #270
+// CHECK-INST: fcmla z4.d, p7/m, z31.d, z31.d, #270
+// CHECK-ENCODING: [0xe4,0x7f,0xdf,0x64]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 7f df 64 <unknown>
+
+movprfx z21, z28
+// CHECK-INST: movprfx z21, z28
+// CHECK-ENCODING: [0x95,0xbf,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 95 bf 20 04 <unknown>
+
+fcmla z21.s, z10.s, z5.s[1], #90
+// CHECK-INST: fcmla z21.s, z10.s, z5.s[1], #90
+// CHECK-ENCODING: [0x55,0x15,0xf5,0x64]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 55 15 f5 64 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fcmle-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fcmle-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fcmle-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fcmle-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -9,3 +9,31 @@ fcmle p0.s, p0/z, z0.s, #1.0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0
// CHECK-NEXT: fcmle p0.s, p0/z, z0.s, #1.0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+fcmle p0.d, p0/z, z0.d, #0.0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmle p0.d, p0/z, z0.d, #0.0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+fcmle p0.d, p0/z, z0.d, #0.0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmle p0.d, p0/z, z0.d, #0.0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+fcmle p0.d, p0/z, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmle p0.d, p0/z, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+fcmle p0.d, p0/z, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmle p0.d, p0/z, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fcmlt-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fcmlt-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fcmlt-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fcmlt-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -9,3 +9,31 @@ fcmlt p0.s, p0/z, z0.s, #1.0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0
// CHECK-NEXT: fcmlt p0.s, p0/z, z0.s, #1.0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+fcmlt p0.d, p0/z, z0.d, #0.0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmlt p0.d, p0/z, z0.d, #0.0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+fcmlt p0.d, p0/z, z0.d, #0.0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmlt p0.d, p0/z, z0.d, #0.0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+fcmlt p0.d, p0/z, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmlt p0.d, p0/z, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+fcmlt p0.d, p0/z, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmlt p0.d, p0/z, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fcmne-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fcmne-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fcmne-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fcmne-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -9,3 +9,31 @@ fcmne p0.s, p0/z, z0.s, #1.0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0
// CHECK-NEXT: fcmne p0.s, p0/z, z0.s, #1.0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+fcmne p0.d, p0/z, z0.d, #0.0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmne p0.d, p0/z, z0.d, #0.0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+fcmne p0.d, p0/z, z0.d, #0.0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmne p0.d, p0/z, z0.d, #0.0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+fcmne p0.d, p0/z, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmne p0.d, p0/z, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+fcmne p0.d, p0/z, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmne p0.d, p0/z, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fcmuo-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fcmuo-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fcmuo-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fcmuo-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -9,3 +9,19 @@ fcmuo p0.s, p0/z, z0.s, #0.0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unexpected floating point literal
// CHECK-NEXT: fcmuo p0.s, p0/z, z0.s, #0.0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+fcmuo p0.d, p0/z, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmuo p0.d, p0/z, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+fcmuo p0.d, p0/z, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fcmuo p0.d, p0/z, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fcpy.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fcpy.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fcpy.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fcpy.s Mon Jul 30 09:05:45 2018
@@ -1554,3 +1554,31 @@ fcpy z0.d, p0/m, #31.00000000
// CHECK-ENCODING: [0xe0,0xc7,0xd0,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 c7 d0 05 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p0/z, z7.d
+// CHECK-INST: movprfx z0.d, p0/z, z7.d
+// CHECK-ENCODING: [0xe0,0x20,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 20 d0 04 <unknown>
+
+fcpy z0.d, p0/m, #31.00000000
+// CHECK-INST: fmov z0.d, p0/m, #31.00000000
+// CHECK-ENCODING: [0xe0,0xc7,0xd0,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 c7 d0 05 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fcpy z0.d, p0/m, #31.00000000
+// CHECK-INST: fmov z0.d, p0/m, #31.00000000
+// CHECK-ENCODING: [0xe0,0xc7,0xd0,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 c7 d0 05 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fcvt.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fcvt.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fcvt.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fcvt.s Mon Jul 30 09:05:45 2018
@@ -42,3 +42,31 @@ fcvt z0.d, p0/m, z0.s
// CHECK-ENCODING: [0x00,0xa0,0xcb,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 00 a0 cb 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z5.d, p0/z, z7.d
+// CHECK-INST: movprfx z5.d, p0/z, z7.d
+// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e5 20 d0 04 <unknown>
+
+fcvt z5.d, p0/m, z0.s
+// CHECK-INST: fcvt z5.d, p0/m, z0.s
+// CHECK-ENCODING: [0x05,0xa0,0xcb,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 a0 cb 65 <unknown>
+
+movprfx z5, z7
+// CHECK-INST: movprfx z5, z7
+// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e5 bc 20 04 <unknown>
+
+fcvt z5.d, p0/m, z0.s
+// CHECK-INST: fcvt z5.d, p0/m, z0.s
+// CHECK-ENCODING: [0x05,0xa0,0xcb,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 a0 cb 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fcvtzs.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fcvtzs.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fcvtzs.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fcvtzs.s Mon Jul 30 09:05:45 2018
@@ -48,3 +48,31 @@ fcvtzs z0.d, p0/m, z0.d
// CHECK-ENCODING: [0x00,0xa0,0xde,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 00 a0 de 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z5.d, p0/z, z7.d
+// CHECK-INST: movprfx z5.d, p0/z, z7.d
+// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e5 20 d0 04 <unknown>
+
+fcvtzs z5.d, p0/m, z0.d
+// CHECK-INST: fcvtzs z5.d, p0/m, z0.d
+// CHECK-ENCODING: [0x05,0xa0,0xde,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 a0 de 65 <unknown>
+
+movprfx z5, z7
+// CHECK-INST: movprfx z5, z7
+// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e5 bc 20 04 <unknown>
+
+fcvtzs z5.d, p0/m, z0.d
+// CHECK-INST: fcvtzs z5.d, p0/m, z0.d
+// CHECK-ENCODING: [0x05,0xa0,0xde,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 a0 de 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fcvtzu.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fcvtzu.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fcvtzu.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fcvtzu.s Mon Jul 30 09:05:45 2018
@@ -48,3 +48,31 @@ fcvtzu z0.d, p0/m, z0.d
// CHECK-ENCODING: [0x00,0xa0,0xdf,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 00 a0 df 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z5.d, p0/z, z7.d
+// CHECK-INST: movprfx z5.d, p0/z, z7.d
+// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e5 20 d0 04 <unknown>
+
+fcvtzu z5.d, p0/m, z0.d
+// CHECK-INST: fcvtzu z5.d, p0/m, z0.d
+// CHECK-ENCODING: [0x05,0xa0,0xdf,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 a0 df 65 <unknown>
+
+movprfx z5, z7
+// CHECK-INST: movprfx z5, z7
+// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e5 bc 20 04 <unknown>
+
+fcvtzu z5.d, p0/m, z0.d
+// CHECK-INST: fcvtzu z5.d, p0/m, z0.d
+// CHECK-ENCODING: [0x05,0xa0,0xdf,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 a0 df 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fdiv.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fdiv.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fdiv.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fdiv.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ fdiv z0.d, p7/m, z0.d, z31.d
// CHECK-ENCODING: [0xe0,0x9f,0xcd,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 9f cd 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+fdiv z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fdiv z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xcd,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f cd 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fdiv z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fdiv z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xcd,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f cd 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fdivr.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fdivr.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fdivr.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fdivr.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ fdivr z0.d, p7/m, z0.d, z31.d
// CHECK-ENCODING: [0xe0,0x9f,0xcc,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 9f cc 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+fdivr z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fdivr z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xcc,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f cc 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fdivr z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fdivr z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xcc,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f cc 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fdup-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fdup-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fdup-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fdup-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -62,3 +62,19 @@ fdup z0.d, #64.00000000 // r = 5, n =
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected compatible register or floating-point constant
// CHECK-NEXT: fdup z0.d, #64.00000000 // r = 5, n = 32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+fdup z0.d, #31.00000000
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fdup z0.d, #31.00000000
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+fdup z0.d, #31.00000000
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fdup z0.d, #31.00000000
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fexpa-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fexpa-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fexpa-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fexpa-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -12,4 +12,19 @@ fexpa z0.b, z31.b
fexpa z0.s, z31.d
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: fexpa z0.s, z31.d
-// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
\ No newline at end of file
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+fexpa z0.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fexpa z0.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+fexpa z0.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fexpa z0.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fmad.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fmad.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fmad.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fmad.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ fmad z0.d, p7/m, z1.d, z31.d
// CHECK-ENCODING: [0x20,0x9c,0xff,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 20 9c ff 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+fmad z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: fmad z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0x20,0x9c,0xff,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 9c ff 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fmad z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: fmad z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0x20,0x9c,0xff,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 9c ff 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fmax.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fmax.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fmax.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fmax.s Mon Jul 30 09:05:45 2018
@@ -66,3 +66,55 @@ fmax z0.d, p7/m, z0.d, z31.d
// CHECK-ENCODING: [0xe0,0x9f,0xc6,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 9f c6 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p0/z, z7.d
+// CHECK-INST: movprfx z0.d, p0/z, z7.d
+// CHECK-ENCODING: [0xe0,0x20,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 20 d0 04 <unknown>
+
+fmax z0.d, p0/m, z0.d, #0.0
+// CHECK-INST: fmax z0.d, p0/m, z0.d, #0.0
+// CHECK-ENCODING: [0x00,0x80,0xde,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 80 de 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fmax z0.d, p0/m, z0.d, #0.0
+// CHECK-INST: fmax z0.d, p0/m, z0.d, #0.0
+// CHECK-ENCODING: [0x00,0x80,0xde,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 80 de 65 <unknown>
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+fmax z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fmax z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xc6,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f c6 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fmax z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fmax z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xc6,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f c6 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fmaxnm.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fmaxnm.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fmaxnm.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fmaxnm.s Mon Jul 30 09:05:45 2018
@@ -72,3 +72,55 @@ fmaxnm z0.d, p7/m, z0.d, z31.d
// CHECK-ENCODING: [0xe0,0x9f,0xc4,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 9f c4 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z31.d, p7/z, z6.d
+// CHECK-INST: movprfx z31.d, p7/z, z6.d
+// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df 3c d0 04 <unknown>
+
+fmaxnm z31.d, p7/m, z31.d, #1.0
+// CHECK-INST: fmaxnm z31.d, p7/m, z31.d, #1.0
+// CHECK-ENCODING: [0x3f,0x9c,0xdc,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 3f 9c dc 65 <unknown>
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+fmaxnm z31.d, p7/m, z31.d, #1.0
+// CHECK-INST: fmaxnm z31.d, p7/m, z31.d, #1.0
+// CHECK-ENCODING: [0x3f,0x9c,0xdc,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 3f 9c dc 65 <unknown>
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+fmaxnm z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fmaxnm z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xc4,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f c4 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fmaxnm z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fmaxnm z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xc4,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f c4 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fmaxnmv-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fmaxnmv-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fmaxnmv-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fmaxnmv-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -17,4 +17,19 @@ fmaxnmv h0, p8, z31.h
fmaxnmv v0, p7, z31.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: fmaxnmv v0, p7, z31.h
-// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
\ No newline at end of file
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+fmaxnmv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fmaxnmv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+fmaxnmv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fmaxnmv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fmaxv-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fmaxv-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fmaxv-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fmaxv-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -17,4 +17,19 @@ fmaxv h0, p8, z31.h
fmaxv v0, p7, z31.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: fmaxv v0, p7, z31.h
-// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
\ No newline at end of file
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+fmaxv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fmaxv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+fmaxv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fmaxv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fmin.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fmin.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fmin.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fmin.s Mon Jul 30 09:05:45 2018
@@ -72,3 +72,55 @@ fmin z0.d, p7/m, z0.d, z31.d
// CHECK-ENCODING: [0xe0,0x9f,0xc7,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 9f c7 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z31.d, p7/z, z6.d
+// CHECK-INST: movprfx z31.d, p7/z, z6.d
+// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df 3c d0 04 <unknown>
+
+fmin z31.d, p7/m, z31.d, #1.0
+// CHECK-INST: fmin z31.d, p7/m, z31.d, #1.0
+// CHECK-ENCODING: [0x3f,0x9c,0xdf,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 3f 9c df 65 <unknown>
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+fmin z31.d, p7/m, z31.d, #1.0
+// CHECK-INST: fmin z31.d, p7/m, z31.d, #1.0
+// CHECK-ENCODING: [0x3f,0x9c,0xdf,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 3f 9c df 65 <unknown>
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+fmin z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fmin z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xc7,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f c7 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fmin z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fmin z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xc7,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f c7 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fminnm.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fminnm.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fminnm.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fminnm.s Mon Jul 30 09:05:45 2018
@@ -72,3 +72,55 @@ fminnm z0.d, p7/m, z0.d, z31.d
// CHECK-ENCODING: [0xe0,0x9f,0xc5,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 9f c5 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z31.d, p7/z, z6.d
+// CHECK-INST: movprfx z31.d, p7/z, z6.d
+// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df 3c d0 04 <unknown>
+
+fminnm z31.d, p7/m, z31.d, #1.0
+// CHECK-INST: fminnm z31.d, p7/m, z31.d, #1.0
+// CHECK-ENCODING: [0x3f,0x9c,0xdd,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 3f 9c dd 65 <unknown>
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+fminnm z31.d, p7/m, z31.d, #1.0
+// CHECK-INST: fminnm z31.d, p7/m, z31.d, #1.0
+// CHECK-ENCODING: [0x3f,0x9c,0xdd,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 3f 9c dd 65 <unknown>
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+fminnm z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fminnm z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xc5,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f c5 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fminnm z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fminnm z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xc5,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f c5 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fminnmv-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fminnmv-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fminnmv-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fminnmv-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -17,4 +17,19 @@ fminnmv h0, p8, z31.h
fminnmv v0, p7, z31.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: fminnmv v0, p7, z31.h
-// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
\ No newline at end of file
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+fminnmv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fminnmv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+fminnmv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fminnmv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fminv-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fminv-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fminv-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fminv-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -17,4 +17,19 @@ fminv h0, p8, z31.h
fminv v0, p7, z31.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: fminv v0, p7, z31.h
-// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
\ No newline at end of file
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+fminv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fminv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+fminv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fminv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fmla-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fmla-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fmla-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fmla-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -70,3 +70,13 @@ fmla z0.d, z1.d, z2.d[2]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1].
// CHECK-NEXT: fmla z0.d, z1.d, z2.d[2]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+fmla z0.d, z1.d, z7.d[1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: fmla z0.d, z1.d, z7.d[1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fmla.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fmla.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fmla.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fmla.s Mon Jul 30 09:05:45 2018
@@ -42,3 +42,43 @@ fmla z0.d, z1.d, z7.d[1]
// CHECK-ENCODING: [0x20,0x00,0xf7,0x64]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 20 00 f7 64 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+fmla z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: fmla z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0x20,0x1c,0xff,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 1c ff 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fmla z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: fmla z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0x20,0x1c,0xff,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 1c ff 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fmla z0.d, z1.d, z7.d[1]
+// CHECK-INST: fmla z0.d, z1.d, z7.d[1]
+// CHECK-ENCODING: [0x20,0x00,0xf7,0x64]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 00 f7 64 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fmls-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fmls-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fmls-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fmls-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -70,3 +70,13 @@ fmls z0.d, z1.d, z2.d[2]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1].
// CHECK-NEXT: fmls z0.d, z1.d, z2.d[2]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+fmls z0.d, z1.d, z7.d[1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: fmls z0.d, z1.d, z7.d[1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fmls.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fmls.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fmls.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fmls.s Mon Jul 30 09:05:45 2018
@@ -42,3 +42,43 @@ fmls z0.d, z1.d, z7.d[1]
// CHECK-ENCODING: [0x20,0x04,0xf7,0x64]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 20 04 f7 64 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+fmls z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: fmls z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0x20,0x3c,0xff,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 3c ff 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fmls z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: fmls z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0x20,0x3c,0xff,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 3c ff 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fmls z0.d, z1.d, z7.d[1]
+// CHECK-INST: fmls z0.d, z1.d, z7.d[1]
+// CHECK-ENCODING: [0x20,0x04,0xf7,0x64]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 04 f7 64 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fmov-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fmov-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fmov-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fmov-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -140,3 +140,19 @@ fmov z0.d, p0/m, #64.00000000 // r =
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected compatible register or floating-point constant
// CHECK-NEXT: fmov z0.d, p0/m, #64.00000000 // r = 5, n = 32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+fmov z0.d, #31.00000000
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fmov z0.d, #31.00000000
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+fmov z0.d, #31.00000000
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fmov z0.d, #31.00000000
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fmov.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fmov.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fmov.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fmov.s Mon Jul 30 09:05:45 2018
@@ -1596,3 +1596,31 @@ fmov z0.d, p0/m, #31.00000000
// CHECK-ENCODING: [0xe0,0xc7,0xd0,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 c7 d0 05 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p0/z, z7.d
+// CHECK-INST: movprfx z0.d, p0/z, z7.d
+// CHECK-ENCODING: [0xe0,0x20,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 20 d0 04 <unknown>
+
+fmov z0.d, p0/m, #31.00000000
+// CHECK-INST: fmov z0.d, p0/m, #31.00000000
+// CHECK-ENCODING: [0xe0,0xc7,0xd0,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 c7 d0 05 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fmov z0.d, p0/m, #31.00000000
+// CHECK-INST: fmov z0.d, p0/m, #31.00000000
+// CHECK-ENCODING: [0xe0,0xc7,0xd0,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 c7 d0 05 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fmsb.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fmsb.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fmsb.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fmsb.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ fmsb z0.d, p7/m, z1.d, z31.d
// CHECK-ENCODING: [0x20,0xbc,0xff,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 20 bc ff 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+fmsb z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: fmsb z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0x20,0xbc,0xff,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 bc ff 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fmsb z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: fmsb z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0x20,0xbc,0xff,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 bc ff 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fmul-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fmul-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fmul-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fmul-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -132,3 +132,31 @@ fmul z0.h, p8/m, z0.h, z31.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: fmul z0.h, p8/m, z0.h, z31.h
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+fmul z0.d, z1.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fmul z0.d, z1.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+fmul z0.d, z1.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fmul z0.d, z1.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31.d, p0/z, z6.d
+fmul z31.d, z31.d, z15.d[1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fmul z31.d, z31.d, z15.d[1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+fmul z31.d, z31.d, z15.d[1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fmul z31.d, z31.d, z15.d[1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fmul.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fmul.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fmul.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fmul.s Mon Jul 30 09:05:45 2018
@@ -120,3 +120,55 @@ fmul z0.d, z1.d, z31.d
// CHECK-ENCODING: [0x20,0x08,0xdf,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 20 08 df 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z31.d, p7/z, z6.d
+// CHECK-INST: movprfx z31.d, p7/z, z6.d
+// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df 3c d0 04 <unknown>
+
+fmul z31.d, p7/m, z31.d, #2.0
+// CHECK-INST: fmul z31.d, p7/m, z31.d, #2.0
+// CHECK-ENCODING: [0x3f,0x9c,0xda,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 3f 9c da 65 <unknown>
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+fmul z31.d, p7/m, z31.d, #2.0
+// CHECK-INST: fmul z31.d, p7/m, z31.d, #2.0
+// CHECK-ENCODING: [0x3f,0x9c,0xda,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 3f 9c da 65 <unknown>
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+fmul z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fmul z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xc2,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f c2 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fmul z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fmul z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xc2,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f c2 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fmulx.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fmulx.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fmulx.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fmulx.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ fmulx z0.d, p7/m, z0.d, z31.d
// CHECK-ENCODING: [0xe0,0x9f,0xca,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 9f ca 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+fmulx z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fmulx z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xca,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f ca 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fmulx z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fmulx z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xca,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f ca 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fneg.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fneg.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fneg.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fneg.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ fneg z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xdd,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf dd 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+fneg z4.d, p7/m, z31.d
+// CHECK-INST: fneg z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xdd,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf dd 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+fneg z4.d, p7/m, z31.d
+// CHECK-INST: fneg z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xdd,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf dd 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fnmad.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fnmad.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fnmad.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fnmad.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ fnmad z0.d, p7/m, z1.d, z31.d
// CHECK-ENCODING: [0x20,0xdc,0xff,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 20 dc ff 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+fnmad z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: fnmad z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0x20,0xdc,0xff,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 dc ff 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fnmad z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: fnmad z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0x20,0xdc,0xff,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 dc ff 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fnmla.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fnmla.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fnmla.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fnmla.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ fnmla z0.d, p7/m, z1.d, z31.d
// CHECK-ENCODING: [0x20,0x5c,0xff,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 20 5c ff 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+fnmla z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: fnmla z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0x20,0x5c,0xff,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 5c ff 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fnmla z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: fnmla z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0x20,0x5c,0xff,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 5c ff 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fnmls.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fnmls.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fnmls.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fnmls.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ fnmls z0.d, p7/m, z1.d, z31.d
// CHECK-ENCODING: [0x20,0x7c,0xff,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 20 7c ff 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+fnmls z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: fnmls z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0x20,0x7c,0xff,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 7c ff 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fnmls z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: fnmls z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0x20,0x7c,0xff,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 7c ff 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fnmsb.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fnmsb.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fnmsb.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fnmsb.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ fnmsb z0.d, p7/m, z1.d, z31.d
// CHECK-ENCODING: [0x20,0xfc,0xff,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 20 fc ff 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+fnmsb z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: fnmsb z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0x20,0xfc,0xff,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 fc ff 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fnmsb z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: fnmsb z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0x20,0xfc,0xff,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 fc ff 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/frecpe-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/frecpe-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/frecpe-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/frecpe-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -3,4 +3,19 @@
frecpe z0.b, z31.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: frecpe z0.b, z31.b
-// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
\ No newline at end of file
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+frecpe z0.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: frecpe z0.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+frecpe z0.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: frecpe z0.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/frecps-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/frecps-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/frecps-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/frecps-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -13,3 +13,19 @@ frecps z0.h, z1.s, z2.s
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: frecps z0.h, z1.s, z2.s
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+frecps z0.d, z1.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: frecps z0.d, z1.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+frecps z0.d, z1.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: frecps z0.d, z1.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/frecpx.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/frecpx.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/frecpx.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/frecpx.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ frecpx z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xcc,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf cc 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+frecpx z4.d, p7/m, z31.d
+// CHECK-INST: frecpx z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xcc,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf cc 65 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+frecpx z4.d, p7/m, z31.d
+// CHECK-INST: frecpx z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xcc,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf cc 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/frinta.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/frinta.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/frinta.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/frinta.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ frinta z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xc4,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf c4 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+frinta z4.d, p7/m, z31.d
+// CHECK-INST: frinta z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xc4,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf c4 65 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+frinta z4.d, p7/m, z31.d
+// CHECK-INST: frinta z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xc4,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf c4 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/frinti.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/frinti.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/frinti.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/frinti.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ frinti z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xc7,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf c7 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+frinti z4.d, p7/m, z31.d
+// CHECK-INST: frinti z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xc7,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf c7 65 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+frinti z4.d, p7/m, z31.d
+// CHECK-INST: frinti z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xc7,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf c7 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/frintm.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/frintm.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/frintm.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/frintm.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ frintm z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xc2,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf c2 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+frintm z4.d, p7/m, z31.d
+// CHECK-INST: frintm z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xc2,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf c2 65 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+frintm z4.d, p7/m, z31.d
+// CHECK-INST: frintm z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xc2,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf c2 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/frintn.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/frintn.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/frintn.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/frintn.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ frintn z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xc0,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf c0 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+frintn z4.d, p7/m, z31.d
+// CHECK-INST: frintn z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xc0,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf c0 65 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+frintn z4.d, p7/m, z31.d
+// CHECK-INST: frintn z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xc0,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf c0 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/frintp.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/frintp.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/frintp.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/frintp.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ frintp z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xc1,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf c1 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+frintp z4.d, p7/m, z31.d
+// CHECK-INST: frintp z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xc1,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf c1 65 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+frintp z4.d, p7/m, z31.d
+// CHECK-INST: frintp z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xc1,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf c1 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/frintx.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/frintx.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/frintx.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/frintx.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ frintx z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xc6,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf c6 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+frintx z4.d, p7/m, z31.d
+// CHECK-INST: frintx z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xc6,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf c6 65 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+frintx z4.d, p7/m, z31.d
+// CHECK-INST: frintx z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xc6,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf c6 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/frintz.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/frintz.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/frintz.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/frintz.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ frintz z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xc3,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf c3 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+frintz z4.d, p7/m, z31.d
+// CHECK-INST: frintz z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xc3,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf c3 65 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+frintz z4.d, p7/m, z31.d
+// CHECK-INST: frintz z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xc3,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf c3 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/frsqrte-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/frsqrte-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/frsqrte-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/frsqrte-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -3,4 +3,19 @@
frsqrte z0.b, z31.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: frsqrte z0.b, z31.b
-// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
\ No newline at end of file
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+frsqrte z0.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: frsqrte z0.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+frsqrte z0.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: frsqrte z0.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/frsqrts-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/frsqrts-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/frsqrts-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/frsqrts-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -13,3 +13,19 @@ frsqrts z0.h, z1.s, z2.s
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: frsqrts z0.h, z1.s, z2.s
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+frsqrts z0.d, z1.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: frsqrts z0.d, z1.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+frsqrts z0.d, z1.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: frsqrts z0.d, z1.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fscale.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fscale.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fscale.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fscale.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ fscale z0.d, p7/m, z0.d, z31.d
// CHECK-ENCODING: [0xe0,0x9f,0xc9,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 9f c9 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+fscale z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fscale z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xc9,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f c9 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fscale z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fscale z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xc9,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f c9 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fsqrt.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fsqrt.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fsqrt.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fsqrt.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ fsqrt z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xcd,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf cd 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+fsqrt z4.d, p7/m, z31.d
+// CHECK-INST: fsqrt z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xcd,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf cd 65 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+fsqrt z4.d, p7/m, z31.d
+// CHECK-INST: fsqrt z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xcd,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf cd 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fsub-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fsub-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fsub-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fsub-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -68,3 +68,19 @@ fsub z0.h, p8/m, z0.h, z31.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: fsub z0.h, p8/m, z0.h, z31.h
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+fsub z0.d, z1.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fsub z0.d, z1.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+fsub z0.d, z1.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: fsub z0.d, z1.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/fsub.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fsub.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fsub.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fsub.s Mon Jul 30 09:05:45 2018
@@ -90,3 +90,55 @@ fsub z0.d, z1.d, z31.d
// CHECK-ENCODING: [0x20,0x04,0xdf,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 20 04 df 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z31.d, p7/z, z6.d
+// CHECK-INST: movprfx z31.d, p7/z, z6.d
+// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df 3c d0 04 <unknown>
+
+fsub z31.d, p7/m, z31.d, #1.0
+// CHECK-INST: fsub z31.d, p7/m, z31.d, #1.0
+// CHECK-ENCODING: [0x3f,0x9c,0xd9,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 3f 9c d9 65 <unknown>
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+fsub z31.d, p7/m, z31.d, #1.0
+// CHECK-INST: fsub z31.d, p7/m, z31.d, #1.0
+// CHECK-ENCODING: [0x3f,0x9c,0xd9,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 3f 9c d9 65 <unknown>
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+fsub z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fsub z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xc1,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f c1 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fsub z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fsub z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xc1,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f c1 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/fsubr.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/fsubr.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/fsubr.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/fsubr.s Mon Jul 30 09:05:45 2018
@@ -72,3 +72,55 @@ fsubr z0.d, p7/m, z0.d, z31.d
// CHECK-ENCODING: [0xe0,0x9f,0xc3,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 9f c3 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z31.d, p7/z, z6.d
+// CHECK-INST: movprfx z31.d, p7/z, z6.d
+// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df 3c d0 04 <unknown>
+
+fsubr z31.d, p7/m, z31.d, #1.0
+// CHECK-INST: fsubr z31.d, p7/m, z31.d, #1.0
+// CHECK-ENCODING: [0x3f,0x9c,0xdb,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 3f 9c db 65 <unknown>
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+fsubr z31.d, p7/m, z31.d, #1.0
+// CHECK-INST: fsubr z31.d, p7/m, z31.d, #1.0
+// CHECK-ENCODING: [0x3f,0x9c,0xdb,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 3f 9c db 65 <unknown>
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+fsubr z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fsubr z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xc3,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f c3 65 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+fsubr z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: fsubr z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xc3,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f c3 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/ftmad-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ftmad-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ftmad-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ftmad-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -36,3 +36,13 @@ ftmad z0.h, z0.h, z1.h, #8
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 7].
// CHECK-NEXT: ftmad z0.h, z0.h, z1.h, #8
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+ftmad z0.d, z0.d, z31.d, #7
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: ftmad z0.d, z0.d, z31.d, #7
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ftmad.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ftmad.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ftmad.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ftmad.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,19 @@ ftmad z0.d, z0.d, z31.d, #7
// CHECK-ENCODING: [0xe0,0x83,0xd7,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 83 d7 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+ftmad z0.d, z0.d, z31.d, #7
+// CHECK-INST: ftmad z0.d, z0.d, z31.d, #7
+// CHECK-ENCODING: [0xe0,0x83,0xd7,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 83 d7 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/ftsmul-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ftsmul-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ftsmul-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ftsmul-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -13,3 +13,19 @@ ftsmul z0.h, z1.s, z2.s
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: ftsmul z0.h, z1.s, z2.s
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+ftsmul z0.d, z1.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ftsmul z0.d, z1.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+ftsmul z0.d, z1.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ftsmul z0.d, z1.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ftssel-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ftssel-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ftssel-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ftssel-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -3,4 +3,19 @@
ftssel z0.b, z1.b, z31.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: ftssel z0.b, z1.b, z31.b
-// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
\ No newline at end of file
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+ftssel z0.d, z1.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ftssel z0.d, z1.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+ftssel z0.d, z1.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ftssel z0.d, z1.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/incd-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/incd-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/incd-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/incd-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -61,3 +61,25 @@ incd x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: incd x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+incd z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: incd z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+incd z0.d, all, mul #16
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: incd z0.d, all, mul #16
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+incd z0.d, all
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: incd z0.d, all
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/incd.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/incd.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/incd.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/incd.s Mon Jul 30 09:05:45 2018
@@ -164,3 +164,43 @@ incd x0, #28
// CHECK-ENCODING: [0x80,0xe3,0xf0,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 80 e3 f0 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+incd z0.d
+// CHECK-INST: incd z0.d
+// CHECK-ENCODING: [0xe0,0xc3,0xf0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 c3 f0 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+incd z0.d, all, mul #16
+// CHECK-INST: incd z0.d, all, mul #16
+// CHECK-ENCODING: [0xe0,0xc3,0xff,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 c3 ff 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+incd z0.d, all
+// CHECK-INST: incd z0.d
+// CHECK-ENCODING: [0xe0,0xc3,0xf0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 c3 f0 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/inch-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/inch-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/inch-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/inch-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -61,3 +61,25 @@ inch x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: inch x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.h, p0/z, z7.h
+inch z0.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: inch z0.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.h, p0/z, z7.h
+inch z0.h, all, mul #16
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: inch z0.h, all, mul #16
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.h, p0/z, z7.h
+inch z0.h, all
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: inch z0.h, all
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/inch.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/inch.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/inch.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/inch.s Mon Jul 30 09:05:45 2018
@@ -164,3 +164,43 @@ inch x0, #28
// CHECK-ENCODING: [0x80,0xe3,0x70,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 80 e3 70 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+inch z0.h
+// CHECK-INST: inch z0.h
+// CHECK-ENCODING: [0xe0,0xc3,0x70,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 c3 70 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+inch z0.h, all, mul #16
+// CHECK-INST: inch z0.h, all, mul #16
+// CHECK-ENCODING: [0xe0,0xc3,0x7f,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 c3 7f 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+inch z0.h, all
+// CHECK-INST: inch z0.h
+// CHECK-ENCODING: [0xe0,0xc3,0x70,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 c3 70 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/incp-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/incp-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/incp-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/incp-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -36,3 +36,13 @@ incp x0, p0.q
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
// CHECK-NEXT: incp x0, p0.q
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+incp z31.d, p7
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: incp z31.d, p7
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/incp.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/incp.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/incp.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/incp.s Mon Jul 30 09:05:45 2018
@@ -72,3 +72,19 @@ incp z31.d, p15
// CHECK-ENCODING: [0xff,0x81,0xec,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 81 ec 25 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+incp z31.d, p15
+// CHECK-INST: incp z31.d, p15
+// CHECK-ENCODING: [0xff,0x81,0xec,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 81 ec 25 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/incw-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/incw-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/incw-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/incw-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -61,3 +61,25 @@ incw x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: incw x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.s, p0/z, z7.s
+incw z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: incw z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+incw z0.s, all, mul #16
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: incw z0.s, all, mul #16
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+incw z0.s, all
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: incw z0.s, all
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/incw.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/incw.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/incw.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/incw.s Mon Jul 30 09:05:45 2018
@@ -165,3 +165,43 @@ incw x0, #28
// CHECK-ENCODING: [0x80,0xe3,0xb0,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 80 e3 b0 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+incw z0.s
+// CHECK-INST: incw z0.s
+// CHECK-ENCODING: [0xe0,0xc3,0xb0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 c3 b0 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+incw z0.s, all, mul #16
+// CHECK-INST: incw z0.s, all, mul #16
+// CHECK-ENCODING: [0xe0,0xc3,0xbf,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 c3 bf 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+incw z0.s, all
+// CHECK-INST: incw z0.s
+// CHECK-ENCODING: [0xe0,0xc3,0xb0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 c3 b0 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/index-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/index-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/index-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/index-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -56,3 +56,43 @@ index z17.d, w9, w7
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-16, 15].
// CHECK-NEXT: index z17.d, w9, w7
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.d, p0/z, z28.d
+index z21.d, x10, x21
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: index z21.d, x10, x21
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+index z21.d, x10, x21
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: index z21.d, x10, x21
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z23.d, p0/z, z30.d
+index z23.d, x13, #8
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: index z23.d, x13, #8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z23, z30
+index z23.d, x13, #8
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: index z23.d, x13, #8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z23.d, p0/z, z30.d
+index z23.d, #13, x8
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: index z23.d, #13, x8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z23, z30
+index z23.d, #13, x8
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: index z23.d, #13, x8
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/insr-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/insr-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/insr-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/insr-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -43,3 +43,19 @@ insr z31.d, b0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: insr z31.d, b0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+insr z31.d, xzr
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: insr z31.d, xzr
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z4.d, p0/z, z6.d
+insr z4.d, d31
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: insr z4.d, d31
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/insr.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/insr.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/insr.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/insr.s Mon Jul 30 09:05:45 2018
@@ -78,3 +78,31 @@ insr z31.d, d31
// CHECK-ENCODING: [0xff,0x3b,0xf4,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 3b f4 05 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+insr z31.d, xzr
+// CHECK-INST: insr z31.d, xzr
+// CHECK-ENCODING: [0xff,0x3b,0xe4,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 3b e4 05 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+insr z4.d, d31
+// CHECK-INST: insr z4.d, d31
+// CHECK-ENCODING: [0xe4,0x3b,0xf4,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 3b f4 05 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/lasta-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/lasta-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/lasta-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/lasta-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -52,3 +52,31 @@ lasta d0, p7, z31.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: lasta d0, p7, z31.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+lasta x0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: lasta x0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+lasta x0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: lasta x0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31.d, p7/z, z6.d
+lasta d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: lasta d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+lasta d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: lasta d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/lastb-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/lastb-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/lastb-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/lastb-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -52,3 +52,31 @@ lastb d0, p7, z31.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: lastb d0, p7, z31.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+lastb x0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: lastb x0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+lastb x0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: lastb x0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31.d, p7/z, z6.d
+lastb d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: lastb d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+lastb d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: lastb d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1b-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1b-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1b-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1b-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -177,3 +177,19 @@ ld1b z0.d, p0/z, [z0.d, #32]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31].
// CHECK-NEXT: ld1b z0.d, p0/z, [z0.d, #32]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+ld1b { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1b { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+ld1b { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1b { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1d-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1d-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1d-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1d-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -132,3 +132,19 @@ ld1d z0.d, p0/z, [z0.d, #3]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 8 in range [0, 248].
// CHECK-NEXT: ld1d z0.d, p0/z, [z0.d, #3]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+ld1d { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1d { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+ld1d { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1d { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1h-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1h-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1h-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1h-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -192,3 +192,19 @@ ld1h z0.d, p0/z, [z0.d, #3]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62].
// CHECK-NEXT: ld1h z0.d, p0/z, [z0.d, #3]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+ld1h { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1h { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+ld1h { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1h { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1rb-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1rb-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1rb-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1rb-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -21,3 +21,19 @@ ld1rb z0.b, p8/z, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: ld1rb z0.b, p8/z, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+ld1rb { z31.d }, p7/z, [sp, #63]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1rb { z31.d }, p7/z, [sp, #63]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+ld1rb { z31.d }, p7/z, [sp, #63]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1rb { z31.d }, p7/z, [sp, #63]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1rd-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1rd-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1rd-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1rd-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -55,3 +55,19 @@ ld1rd z0.d, p8/z, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: ld1rd z0.d, p8/z, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+ld1rd { z31.d }, p7/z, [sp, #504]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1rd { z31.d }, p7/z, [sp, #504]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+ld1rd { z31.d }, p7/z, [sp, #504]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1rd { z31.d }, p7/z, [sp, #504]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1rh-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1rh-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1rh-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1rh-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -45,3 +45,19 @@ ld1rh z0.h, p8/z, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: ld1rh z0.h, p8/z, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+ld1rh { z31.d }, p7/z, [sp, #126]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1rh { z31.d }, p7/z, [sp, #126]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+ld1rh { z31.d }, p7/z, [sp, #126]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1rh { z31.d }, p7/z, [sp, #126]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1rqb-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1rqb-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1rqb-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1rqb-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -79,3 +79,19 @@ ld1rqb z0.b, p0/z, [x0, w1, uxtw]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift
// CHECK-NEXT: ld1rqb z0.b, p0/z, [x0, w1, uxtw]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.b, p5/z, z28.b
+ld1rqb { z21.b }, p5/z, [x10, #112]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1rqb { z21.b }, p5/z, [x10, #112]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+ld1rqb { z21.b }, p5/z, [x10, #112]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1rqb { z21.b }, p5/z, [x10, #112]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1rqd-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1rqd-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1rqd-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1rqd-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -79,3 +79,19 @@ ld1rqd z0.d, p0/z, [x0, w1, uxtw #1]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #3'
// CHECK-NEXT: ld1rqd z0.d, p0/z, [x0, w1, uxtw #1]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z23.d, p3/z, z30.d
+ld1rqd { z23.d }, p3/z, [x13, #112]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1rqd { z23.d }, p3/z, [x13, #112]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z23, z30
+ld1rqd { z23.d }, p3/z, [x13, #112]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1rqd { z23.d }, p3/z, [x13, #112]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1rqh-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1rqh-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1rqh-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1rqh-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -79,3 +79,19 @@ ld1rqh z0.h, p0/z, [x0, w1, uxtw #1]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #1'
// CHECK-NEXT: ld1rqh z0.h, p0/z, [x0, w1, uxtw #1]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z23.h, p3/z, z30.h
+ld1rqh { z23.h }, p3/z, [x13, #112]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1rqh { z23.h }, p3/z, [x13, #112]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z23, z30
+ld1rqh { z23.h }, p3/z, [x13, #112]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1rqh { z23.h }, p3/z, [x13, #112]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1rqw-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1rqw-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1rqw-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1rqw-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -79,3 +79,19 @@ ld1rqw z0.s, p0/z, [x0, w1, uxtw #1]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #2'
// CHECK-NEXT: ld1rqw z0.s, p0/z, [x0, w1, uxtw #1]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z23.s, p3/z, z30.s
+ld1rqw { z23.s }, p3/z, [x13, #112]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1rqw { z23.s }, p3/z, [x13, #112]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z23, z30
+ld1rqw { z23.s }, p3/z, [x13, #112]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1rqw { z23.s }, p3/z, [x13, #112]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1rsb-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1rsb-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1rsb-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1rsb-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -30,3 +30,19 @@ ld1rsb z0.h, p8/z, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: ld1rsb z0.h, p8/z, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+ld1rsb { z31.d }, p7/z, [sp, #63]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1rsb { z31.d }, p7/z, [sp, #63]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+ld1rsb { z31.d }, p7/z, [sp, #63]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1rsb { z31.d }, p7/z, [sp, #63]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1rsh-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1rsh-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1rsh-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1rsh-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -40,3 +40,19 @@ ld1rsh z0.s, p8/z, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: ld1rsh z0.s, p8/z, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+ld1rsh { z31.d }, p7/z, [sp, #126]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1rsh { z31.d }, p7/z, [sp, #126]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+ld1rsh { z31.d }, p7/z, [sp, #126]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1rsh { z31.d }, p7/z, [sp, #126]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1rsw-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1rsw-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1rsw-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1rsw-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -45,3 +45,19 @@ ld1rsw z0.d, p8/z, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: ld1rsw z0.d, p8/z, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+ld1rsw { z31.d }, p7/z, [sp, #252]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1rsw { z31.d }, p7/z, [sp, #252]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+ld1rsw { z31.d }, p7/z, [sp, #252]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1rsw { z31.d }, p7/z, [sp, #252]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1rw-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1rw-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1rw-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1rw-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -50,3 +50,19 @@ ld1rw z0.s, p8/z, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: ld1rw z0.s, p8/z, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+ld1rw { z31.d }, p7/z, [sp, #252]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1rw { z31.d }, p7/z, [sp, #252]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+ld1rw { z31.d }, p7/z, [sp, #252]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1rw { z31.d }, p7/z, [sp, #252]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1sb-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1sb-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1sb-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1sb-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -175,3 +175,19 @@ ld1sb z0.d, p0/z, [z0.d, #32]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31].
// CHECK-NEXT: ld1sb z0.d, p0/z, [z0.d, #32]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+ld1sb { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1sb { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+ld1sb { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1sb { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1sh-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1sh-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1sh-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1sh-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -191,3 +191,19 @@ ld1sh z0.d, p0/z, [z0.d, #3]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62].
// CHECK-NEXT: ld1sh z0.d, p0/z, [z0.d, #3]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+ld1sh { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1sh { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+ld1sh { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1sh { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1sw-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1sw-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1sw-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1sw-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -161,3 +161,19 @@ ld1sw z0.d, p0/z, [z0.d, #3]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124].
// CHECK-NEXT: ld1sw z0.d, p0/z, [z0.d, #3]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+ld1sw { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1sw { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+ld1sw { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1sw { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld1w-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld1w-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld1w-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld1w-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -177,3 +177,19 @@ ld1w z0.d, p0/z, [z0.d, #3]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124].
// CHECK-NEXT: ld1w z0.d, p0/z, [z0.d, #3]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+ld1w { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1w { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+ld1w { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld1w { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld2b-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld2b-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld2b-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld2b-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -89,3 +89,19 @@ ld2b { v0.2d, v1.2d }, p0/z, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ld2b { v0.2d, v1.2d }, p0/z, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.b, p5/z, z28.b
+ld2b { z21.b, z22.b }, p5/z, [x10, #10, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld2b { z21.b, z22.b }, p5/z, [x10, #10, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+ld2b { z21.b, z22.b }, p5/z, [x10, #10, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld2b { z21.b, z22.b }, p5/z, [x10, #10, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld2d-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld2d-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld2d-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld2d-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -94,3 +94,19 @@ ld2d { v0.2d, v1.2d }, p0/z, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ld2d { v0.2d, v1.2d }, p0/z, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.d, p5/z, z28.d
+ld2d { z21.d, z22.d }, p5/z, [x10, #10, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld2d { z21.d, z22.d }, p5/z, [x10, #10, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+ld2d { z21.d, z22.d }, p5/z, [x10, #10, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld2d { z21.d, z22.d }, p5/z, [x10, #10, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld2h-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld2h-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld2h-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld2h-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -94,3 +94,19 @@ ld2h { v0.2d, v1.2d }, p0/z, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ld2h { v0.2d, v1.2d }, p0/z, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.h, p5/z, z28.h
+ld2h { z21.h, z22.h }, p5/z, [x10, #10, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld2h { z21.h, z22.h }, p5/z, [x10, #10, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+ld2h { z21.h, z22.h }, p5/z, [x10, #10, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld2h { z21.h, z22.h }, p5/z, [x10, #10, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld2w-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld2w-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld2w-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld2w-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -94,3 +94,19 @@ ld2w { v0.2d, v1.2d }, p0/z, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ld2w { v0.2d, v1.2d }, p0/z, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.s, p5/z, z28.s
+ld2w { z21.s, z22.s }, p5/z, [x10, #10, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld2w { z21.s, z22.s }, p5/z, [x10, #10, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+ld2w { z21.s, z22.s }, p5/z, [x10, #10, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld2w { z21.s, z22.s }, p5/z, [x10, #10, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld3b-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld3b-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld3b-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld3b-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -89,3 +89,19 @@ ld3b { v0.16b, v1.16b, v2.16b }, p0/z, [
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ld3b { v0.16b, v1.16b, v2.16b }, p0/z, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.b, p5/z, z28.b
+ld3b { z21.b, z22.b, z23.b }, p5/z, [x10, #15, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld3b { z21.b, z22.b, z23.b }, p5/z, [x10, #15, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+ld3b { z21.b, z22.b, z23.b }, p5/z, [x10, #15, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld3b { z21.b, z22.b, z23.b }, p5/z, [x10, #15, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld3d-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld3d-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld3d-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld3d-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -94,3 +94,19 @@ ld3d { v0.2d, v1.2d, v2.2d }, p0/z, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ld3d { v0.2d, v1.2d, v2.2d }, p0/z, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.d, p5/z, z28.d
+ld3d { z21.d, z22.d, z23.d }, p5/z, [x10, #15, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld3d { z21.d, z22.d, z23.d }, p5/z, [x10, #15, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+ld3d { z21.d, z22.d, z23.d }, p5/z, [x10, #15, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld3d { z21.d, z22.d, z23.d }, p5/z, [x10, #15, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld3h-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld3h-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld3h-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld3h-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -94,3 +94,19 @@ ld3h { v0.8h, v1.8h, v2.8h }, p0/z, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ld3h { v0.8h, v1.8h, v2.8h }, p0/z, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.h, p5/z, z28.h
+ld3h { z21.h, z22.h, z23.h }, p5/z, [x10, #15, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld3h { z21.h, z22.h, z23.h }, p5/z, [x10, #15, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+ld3h { z21.h, z22.h, z23.h }, p5/z, [x10, #15, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld3h { z21.h, z22.h, z23.h }, p5/z, [x10, #15, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld3w-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld3w-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld3w-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld3w-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -94,3 +94,19 @@ ld3w { v0.4s, v1.4s, v2.4s }, p0/z, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ld3w { v0.4s, v1.4s, v2.4s }, p0/z, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.s, p5/z, z28.s
+ld3w { z21.s, z22.s, z23.s }, p5/z, [x10, #15, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld3w { z21.s, z22.s, z23.s }, p5/z, [x10, #15, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+ld3w { z21.s, z22.s, z23.s }, p5/z, [x10, #15, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld3w { z21.s, z22.s, z23.s }, p5/z, [x10, #15, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld4b-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld4b-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld4b-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld4b-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -89,3 +89,19 @@ ld4b { v0.16b, v1.16b, v2.16b }, p0/z, [
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ld4b { v0.16b, v1.16b, v2.16b }, p0/z, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.b, p5/z, z28.b
+ld4b { z21.b, z22.b, z23.b, z24.b }, p5/z, [x10, #20, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld4b { z21.b, z22.b, z23.b, z24.b }, p5/z, [x10, #20, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+ld4b { z21.b, z22.b, z23.b, z24.b }, p5/z, [x10, #20, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld4b { z21.b, z22.b, z23.b, z24.b }, p5/z, [x10, #20, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld4d-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld4d-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld4d-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld4d-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -94,3 +94,19 @@ ld4d { v0.2d, v1.2d, v2.2d }, p0/z, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ld4d { v0.2d, v1.2d, v2.2d }, p0/z, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.d, p5/z, z28.d
+ld4d { z21.d, z22.d, z23.d, z24.d }, p5/z, [x10, #20, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld4d { z21.d, z22.d, z23.d, z24.d }, p5/z, [x10, #20, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+ld4d { z21.d, z22.d, z23.d, z24.d }, p5/z, [x10, #20, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld4d { z21.d, z22.d, z23.d, z24.d }, p5/z, [x10, #20, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld4h-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld4h-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld4h-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld4h-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -94,3 +94,19 @@ ld4h { v0.8h, v1.8h, v2.8h }, p0/z, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ld4h { v0.8h, v1.8h, v2.8h }, p0/z, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.h, p5/z, z28.h
+ld4h { z21.h, z22.h, z23.h, z24.h }, p5/z, [x10, #20, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld4h { z21.h, z22.h, z23.h, z24.h }, p5/z, [x10, #20, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+ld4h { z21.h, z22.h, z23.h, z24.h }, p5/z, [x10, #20, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld4h { z21.h, z22.h, z23.h, z24.h }, p5/z, [x10, #20, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ld4w-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ld4w-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ld4w-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ld4w-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -94,3 +94,19 @@ ld4w { v0.4s, v1.4s, v2.4s }, p0/z, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ld4w { v0.4s, v1.4s, v2.4s }, p0/z, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.s, p5/z, z28.s
+ld4w { z21.s, z22.s, z23.s, z24.s }, p5/z, [x10, #20, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld4w { z21.s, z22.s, z23.s, z24.s }, p5/z, [x10, #20, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+ld4w { z21.s, z22.s, z23.s, z24.s }, p5/z, [x10, #20, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ld4w { z21.s, z22.s, z23.s, z24.s }, p5/z, [x10, #20, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldff1b-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldff1b-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldff1b-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldff1b-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -112,3 +112,19 @@ ldff1b z0.d, p0/z, [z0.d, #32]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31].
// CHECK-NEXT: ldff1b z0.d, p0/z, [z0.d, #32]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+ldff1b { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldff1b { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+ldff1b { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldff1b { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldff1d-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldff1d-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldff1d-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldff1d-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -111,3 +111,19 @@ ldff1d z0.d, p0/z, [z0.d, #3]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 8 in range [0, 248].
// CHECK-NEXT: ldff1d z0.d, p0/z, [z0.d, #3]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+ldff1d { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldff1d { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+ldff1d { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldff1d { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldff1h-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldff1h-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldff1h-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldff1h-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -141,3 +141,19 @@ ldff1h z0.d, p0/z, [z0.d, #3]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62].
// CHECK-NEXT: ldff1h z0.d, p0/z, [z0.d, #3]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+ldff1h { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldff1h { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+ldff1h { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldff1h { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldff1sb-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldff1sb-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldff1sb-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldff1sb-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -115,3 +115,19 @@ ldff1sb z0.d, p0/z, [z0.d, #32]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31].
// CHECK-NEXT: ldff1sb z0.d, p0/z, [z0.d, #32]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+ldff1sb { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldff1sb { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+ldff1sb { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldff1sb { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldff1sh-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldff1sh-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldff1sh-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldff1sh-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -135,3 +135,19 @@ ldff1sh z0.d, p0/z, [z0.d, #3]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62].
// CHECK-NEXT: ldff1sh z0.d, p0/z, [z0.d, #3]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+ldff1sh { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldff1sh { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+ldff1sh { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldff1sh { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldff1sw-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldff1sw-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldff1sw-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldff1sw-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -116,3 +116,19 @@ ldff1sw z0.d, p0/z, [z0.d, #3]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124].
// CHECK-NEXT: ldff1sw z0.d, p0/z, [z0.d, #3]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+ldff1sw { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldff1sw { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+ldff1sw { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldff1sw { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldff1w-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldff1w-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldff1w-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldff1w-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -141,3 +141,19 @@ ldff1w z0.d, p0/z, [z0.d, #3]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124].
// CHECK-NEXT: ldff1w z0.d, p0/z, [z0.d, #3]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+ldff1w { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldff1w { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+ldff1w { z0.d }, p0/z, [z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldff1w { z0.d }, p0/z, [z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldnf1b-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldnf1b-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldnf1b-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldnf1b-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -85,3 +85,19 @@ ldnf1b { v0.2d }, p0/z, [x1, #1, MUL VL]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ldnf1b { v0.2d }, p0/z, [x1, #1, MUL VL]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.d, p5/z, z28.d
+ldnf1b { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldnf1b { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+ldnf1b { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldnf1b { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldnf1d-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldnf1d-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldnf1d-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldnf1d-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -40,3 +40,19 @@ ldnf1d { v0.2d }, p0/z, [x1, #1, MUL VL]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ldnf1d { v0.2d }, p0/z, [x1, #1, MUL VL]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.d, p5/z, z28.d
+ldnf1d { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldnf1d { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+ldnf1d { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldnf1d { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldnf1h-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldnf1h-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldnf1h-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldnf1h-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -70,3 +70,19 @@ ldnf1h { v0.2d }, p0/z, [x1, #1, MUL VL]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ldnf1h { v0.2d }, p0/z, [x1, #1, MUL VL]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.d, p5/z, z28.d
+ldnf1h { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldnf1h { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+ldnf1h { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldnf1h { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldnf1sb-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldnf1sb-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldnf1sb-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldnf1sb-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -84,3 +84,19 @@ ldnf1sb { v0.2d }, p0/z, [x1, #1, MUL VL
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ldnf1sb { v0.2d }, p0/z, [x1, #1, MUL VL]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.d, p5/z, z28.d
+ldnf1sb { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldnf1sb { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+ldnf1sb { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldnf1sb { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldnf1sh-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldnf1sh-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldnf1sh-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldnf1sh-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -69,3 +69,19 @@ ldnf1sh { v0.2d }, p0/z, [x1, #1, MUL VL
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ldnf1sh { v0.2d }, p0/z, [x1, #1, MUL VL]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.d, p5/z, z28.d
+ldnf1sh { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldnf1sh { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+ldnf1sh { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldnf1sh { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldnf1sw-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldnf1sw-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldnf1sw-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldnf1sw-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -54,3 +54,19 @@ ldnf1sw { v0.2d }, p0/z, [x1, #1, MUL VL
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ldnf1sw { v0.2d }, p0/z, [x1, #1, MUL VL]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.d, p5/z, z28.d
+ldnf1sw { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldnf1sw { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+ldnf1sw { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldnf1sw { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldnf1w-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldnf1w-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldnf1w-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldnf1w-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -55,3 +55,19 @@ ldnf1w { v0.2d }, p0/z, [x1, #1, MUL VL]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ldnf1w { v0.2d }, p0/z, [x1, #1, MUL VL]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.d, p5/z, z28.d
+ldnf1w { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldnf1w { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+ldnf1w { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldnf1w { z21.d }, p5/z, [x10, #5, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldnt1b-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldnt1b-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldnt1b-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldnt1b-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -59,3 +59,19 @@ ldnt1b { v0.2d }, p0/z, [x1, #1, MUL VL]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ldnt1b { v0.2d }, p0/z, [x1, #1, MUL VL]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.b, p0/z, z7.b
+ldnt1b { z0.b }, p0/z, [x0, x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldnt1b { z0.b }, p0/z, [x0, x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+ldnt1b { z0.b }, p0/z, [x0, x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldnt1b { z0.b }, p0/z, [x0, x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldnt1d-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldnt1d-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldnt1d-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldnt1d-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -59,3 +59,19 @@ ldnt1d { v0.2d }, p0/z, [x1, #1, MUL VL]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ldnt1d { v0.2d }, p0/z, [x1, #1, MUL VL]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+ldnt1d { z0.d }, p0/z, [x0, x0, lsl #3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldnt1d { z0.d }, p0/z, [x0, x0, lsl #3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+ldnt1d { z0.d }, p0/z, [x0, x0, lsl #3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldnt1d { z0.d }, p0/z, [x0, x0, lsl #3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldnt1h-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldnt1h-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldnt1h-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldnt1h-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -59,3 +59,19 @@ ldnt1h { v0.2d }, p0/z, [x1, #1, MUL VL]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ldnt1h { v0.2d }, p0/z, [x1, #1, MUL VL]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.h, p0/z, z7.h
+ldnt1h { z0.h }, p0/z, [x0, x0, lsl #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldnt1h { z0.h }, p0/z, [x0, x0, lsl #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+ldnt1h { z0.h }, p0/z, [x0, x0, lsl #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldnt1h { z0.h }, p0/z, [x0, x0, lsl #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ldnt1w-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ldnt1w-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ldnt1w-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ldnt1w-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -59,3 +59,19 @@ ldnt1w { v0.2d }, p0/z, [x1, #1, MUL VL]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ldnt1w { v0.2d }, p0/z, [x1, #1, MUL VL]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.s, p0/z, z7.s
+ldnt1w { z0.s }, p0/z, [x0, x0, lsl #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldnt1w { z0.s }, p0/z, [x0, x0, lsl #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+ldnt1w { z0.s }, p0/z, [x0, x0, lsl #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: ldnt1w { z0.s }, p0/z, [x0, x0, lsl #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/lsl-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/lsl-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/lsl-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/lsl-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -120,3 +120,31 @@ lsl z0.b, p8/m, z0.b, z1.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: lsl z0.b, p8/m, z0.b, z1.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+lsl z31.d, z31.d, #63
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: lsl z31.d, z31.d, #63
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+lsl z31.d, z31.d, #63
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: lsl z31.d, z31.d, #63
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+lsl z0.s, z1.s, z2.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: lsl z0.s, z1.s, z2.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+lsl z0.s, z1.s, z2.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: lsl z0.s, z1.s, z2.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/lsl.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/lsl.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/lsl.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/lsl.s Mon Jul 30 09:05:45 2018
@@ -162,3 +162,55 @@ lsl z0.s, z1.s, z2.d
// CHECK-ENCODING: [0x20,0x8c,0xa2,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 20 8c a2 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z31.d, p0/z, z6.d
+// CHECK-INST: movprfx z31.d, p0/z, z6.d
+// CHECK-ENCODING: [0xdf,0x20,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df 20 d0 04 <unknown>
+
+lsl z31.d, p0/m, z31.d, #63
+// CHECK-INST: lsl z31.d, p0/m, z31.d, #63
+// CHECK-ENCODING: [0xff,0x83,0xc3,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 83 c3 04 <unknown>
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+lsl z31.d, p0/m, z31.d, #63
+// CHECK-INST: lsl z31.d, p0/m, z31.d, #63
+// CHECK-ENCODING: [0xff,0x83,0xc3,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 83 c3 04 <unknown>
+
+movprfx z0.s, p0/z, z7.s
+// CHECK-INST: movprfx z0.s, p0/z, z7.s
+// CHECK-ENCODING: [0xe0,0x20,0x90,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 20 90 04 <unknown>
+
+lsl z0.s, p0/m, z0.s, z1.d
+// CHECK-INST: lsl z0.s, p0/m, z0.s, z1.d
+// CHECK-ENCODING: [0x20,0x80,0x9b,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 80 9b 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+lsl z0.s, p0/m, z0.s, z1.d
+// CHECK-INST: lsl z0.s, p0/m, z0.s, z1.d
+// CHECK-ENCODING: [0x20,0x80,0x9b,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 80 9b 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/lslr.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/lslr.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/lslr.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/lslr.s Mon Jul 30 09:05:45 2018
@@ -30,3 +30,31 @@ lslr z0.d, p0/m, z0.d, z0.d
// CHECK-ENCODING: [0x00,0x80,0xd7,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 00 80 d7 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z5.d, p0/z, z7.d
+// CHECK-INST: movprfx z5.d, p0/z, z7.d
+// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e5 20 d0 04 <unknown>
+
+lslr z5.d, p0/m, z5.d, z0.d
+// CHECK-INST: lslr z5.d, p0/m, z5.d, z0.d
+// CHECK-ENCODING: [0x05,0x80,0xd7,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 80 d7 04 <unknown>
+
+movprfx z5, z7
+// CHECK-INST: movprfx z5, z7
+// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e5 bc 20 04 <unknown>
+
+lslr z5.d, p0/m, z5.d, z0.d
+// CHECK-INST: lslr z5.d, p0/m, z5.d, z0.d
+// CHECK-ENCODING: [0x05,0x80,0xd7,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 80 d7 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/lsr-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/lsr-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/lsr-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/lsr-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -121,3 +121,31 @@ lsr z0.b, p8/m, z0.b, z1.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: lsr z0.b, p8/m, z0.b, z1.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+lsr z31.d, z31.d, #64
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: lsr z31.d, z31.d, #64
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+lsr z31.d, z31.d, #64
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: lsr z31.d, z31.d, #64
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+lsr z0.s, z1.s, z2.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: lsr z0.s, z1.s, z2.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+lsr z0.s, z1.s, z2.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: lsr z0.s, z1.s, z2.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/lsr.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/lsr.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/lsr.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/lsr.s Mon Jul 30 09:05:45 2018
@@ -162,3 +162,55 @@ lsr z0.s, z1.s, z2.d
// CHECK-ENCODING: [0x20,0x84,0xa2,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 20 84 a2 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z31.d, p0/z, z6.d
+// CHECK-INST: movprfx z31.d, p0/z, z6.d
+// CHECK-ENCODING: [0xdf,0x20,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df 20 d0 04 <unknown>
+
+lsr z31.d, p0/m, z31.d, #64
+// CHECK-INST: lsr z31.d, p0/m, z31.d, #64
+// CHECK-ENCODING: [0x1f,0x80,0x81,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 1f 80 81 04 <unknown>
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+lsr z31.d, p0/m, z31.d, #64
+// CHECK-INST: lsr z31.d, p0/m, z31.d, #64
+// CHECK-ENCODING: [0x1f,0x80,0x81,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 1f 80 81 04 <unknown>
+
+movprfx z0.s, p0/z, z7.s
+// CHECK-INST: movprfx z0.s, p0/z, z7.s
+// CHECK-ENCODING: [0xe0,0x20,0x90,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 20 90 04 <unknown>
+
+lsr z0.s, p0/m, z0.s, z1.d
+// CHECK-INST: lsr z0.s, p0/m, z0.s, z1.d
+// CHECK-ENCODING: [0x20,0x80,0x99,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 80 99 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+lsr z0.s, p0/m, z0.s, z1.d
+// CHECK-INST: lsr z0.s, p0/m, z0.s, z1.d
+// CHECK-ENCODING: [0x20,0x80,0x99,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 80 99 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/lsrr.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/lsrr.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/lsrr.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/lsrr.s Mon Jul 30 09:05:45 2018
@@ -30,3 +30,31 @@ lsrr z0.d, p0/m, z0.d, z0.d
// CHECK-ENCODING: [0x00,0x80,0xd5,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 00 80 d5 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z5.d, p0/z, z7.d
+// CHECK-INST: movprfx z5.d, p0/z, z7.d
+// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e5 20 d0 04 <unknown>
+
+lsrr z5.d, p0/m, z5.d, z0.d
+// CHECK-INST: lsrr z5.d, p0/m, z5.d, z0.d
+// CHECK-ENCODING: [0x05,0x80,0xd5,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 80 d5 04 <unknown>
+
+movprfx z5, z7
+// CHECK-INST: movprfx z5, z7
+// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e5 bc 20 04 <unknown>
+
+lsrr z5.d, p0/m, z5.d, z0.d
+// CHECK-INST: lsrr z5.d, p0/m, z5.d, z0.d
+// CHECK-ENCODING: [0x05,0x80,0xd5,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 80 d5 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/mad.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/mad.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/mad.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/mad.s Mon Jul 30 09:05:45 2018
@@ -30,3 +30,31 @@ mad z0.d, p7/m, z1.d, z31.d
// CHECK-ENCODING: [0xe0,0xdf,0xc1,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 df c1 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+mad z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: mad z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0xe0,0xdf,0xc1,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 df c1 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+mad z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: mad z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0xe0,0xdf,0xc1,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 df c1 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/mla.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/mla.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/mla.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/mla.s Mon Jul 30 09:05:45 2018
@@ -30,3 +30,31 @@ mla z0.d, p7/m, z1.d, z31.d
// CHECK-ENCODING: [0x20,0x5c,0xdf,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 20 5c df 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+mla z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: mla z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0x20,0x5c,0xdf,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 5c df 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+mla z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: mla z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0x20,0x5c,0xdf,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 5c df 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/mls.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/mls.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/mls.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/mls.s Mon Jul 30 09:05:45 2018
@@ -30,3 +30,31 @@ mls z0.d, p7/m, z1.d, z31.d
// CHECK-ENCODING: [0x20,0x7c,0xdf,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 20 7c df 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+mls z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: mls z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0x20,0x7c,0xdf,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 7c df 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+mls z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: mls z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0x20,0x7c,0xdf,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 7c df 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/mov-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/mov-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/mov-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/mov-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -412,3 +412,79 @@ mov z24.q, z21.q[4]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
// CHECK-NEXT: mov z24.q, z21.q[4]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.b, p0/z, z6.b
+mov z31.b, wsp
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: mov z31.b, wsp
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+mov z31.b, wsp
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: mov z31.b, wsp
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+mov z0.d, #0xe0000000000003ff
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: mov z0.d, #0xe0000000000003ff
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+mov z0.d, #0xe0000000000003ff
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: mov z0.d, #0xe0000000000003ff
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z4.d, p7/z, z6.d
+mov z4.d, p7/m, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: mov z4.d, p7/m, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+mov z31.d, p15/m, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: mov z31.d, p15/m, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+mov z0.d, d0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: mov z0.d, d0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+mov z0.d, d0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: mov z0.d, d0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31.d, p0/z, z6.d
+mov z31.d, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: mov z31.d, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+mov z31.d, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: mov z31.d, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31.d, p0/z, z6.d
+mov z31.d, z31.d[7]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: mov z31.d, z31.d[7]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+mov z31.d, z31.d[7]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: mov z31.d, z31.d[7]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/mov.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/mov.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/mov.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/mov.s Mon Jul 30 09:05:45 2018
@@ -660,3 +660,79 @@ mov p15.b, p15/z, p15.b
// CHECK-ENCODING: [0xef,0x7d,0x0f,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ef 7d 0f 25 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z31.d, p7/z, z6.d
+// CHECK-INST: movprfx z31.d, p7/z, z6.d
+// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df 3c d0 04 <unknown>
+
+mov z31.d, p7/m, sp
+// CHECK-INST: mov z31.d, p7/m, sp
+// CHECK-ENCODING: [0xff,0xbf,0xe8,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff bf e8 05 <unknown>
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+mov z31.d, p7/m, sp
+// CHECK-INST: mov z31.d, p7/m, sp
+// CHECK-ENCODING: [0xff,0xbf,0xe8,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff bf e8 05 <unknown>
+
+movprfx z21.d, p7/z, z28.d
+// CHECK-INST: movprfx z21.d, p7/z, z28.d
+// CHECK-ENCODING: [0x95,0x3f,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 95 3f d0 04 <unknown>
+
+mov z21.d, p7/m, #-128, lsl #8
+// CHECK-INST: mov z21.d, p7/m, #-32768
+// CHECK-ENCODING: [0x15,0x70,0xd7,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 15 70 d7 05 <unknown>
+
+movprfx z21, z28
+// CHECK-INST: movprfx z21, z28
+// CHECK-ENCODING: [0x95,0xbf,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 95 bf 20 04 <unknown>
+
+mov z21.d, p15/m, #-128, lsl #8
+// CHECK-INST: mov z21.d, p15/m, #-32768
+// CHECK-ENCODING: [0x15,0x70,0xdf,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 15 70 df 05 <unknown>
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+mov z4.d, p7/m, d31
+// CHECK-INST: mov z4.d, p7/m, d31
+// CHECK-ENCODING: [0xe4,0x9f,0xe0,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 9f e0 05 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+mov z4.d, p7/m, d31
+// CHECK-INST: mov z4.d, p7/m, d31
+// CHECK-ENCODING: [0xe4,0x9f,0xe0,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 9f e0 05 <unknown>
Added: llvm/trunk/test/MC/AArch64/SVE/movprfx-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/movprfx-diagnostics.s?rev=338261&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/movprfx-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/movprfx-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -0,0 +1,193 @@
+// RUN: not llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -mattr=+sve 2>&1 < %s | FileCheck %s
+
+// ------------------------------------------------------------------------- //
+// Different destination register (unary)
+
+movprfx z0, z1
+abs z2.d, p0/m, z2.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx writing to a different destination
+// CHECK-NEXT: abs z2.d, p0/m, z2.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Different destination register (binary)
+
+movprfx z0, z1
+add z2.d, p0/m, z2.d, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx writing to a different destination
+// CHECK-NEXT: add z2.d, p0/m, z2.d, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Different destination register (wide element)
+
+movprfx z0, z1
+asr z2.s, p0/m, z2.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx writing to a different destination
+// CHECK-NEXT: asr z2.s, p0/m, z2.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Different destination register (ternary)
+
+movprfx z0, z1
+mla z3.d, p0/m, z1.d, z2.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx writing to a different destination
+// CHECK-NEXT: mla z3.d, p0/m, z1.d, z2.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Destination used in other operand (unary)
+
+movprfx z0, z1
+abs z0.d, p0/m, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx and destination also used as non-destructive source
+// CHECK-NEXT: abs z0.d, p0/m, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z1.d
+cpy z0.d, p0/m, d0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx and destination also used as non-destructive source
+// CHECK-NEXT: cpy z0.d, p0/m, d0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z1.d
+mov z0.d, p0/m, d0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx and destination also used as non-destructive source
+// CHECK-NEXT: mov z0.d, p0/m, d0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// ------------------------------------------------------------------------- //
+// Destination used in other operand (binary)
+
+movprfx z0, z1
+add z0.d, p0/m, z0.d, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx and destination also used as non-destructive source
+// CHECK-NEXT: add z0.d, p0/m, z0.d, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Destination used in other operand (wide element)
+
+movprfx z0, z1
+asr z0.s, p0/m, z0.s, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx and destination also used as non-destructive source
+// CHECK-NEXT: asr z0.s, p0/m, z0.s, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Destination used in other operand (ternary)
+
+movprfx z0, z1
+mla z0.d, p0/m, z0.d, z2.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx and destination also used as non-destructive source
+// CHECK-NEXT: mla z0.d, p0/m, z0.d, z2.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Different general predicate (unary)
+
+movprfx z0.d, p0/m, z1.d
+abs z0.d, p1/m, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx using a different general predicate
+// CHECK-NEXT: abs z0.d, p1/m, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Different general predicate (binary)
+
+movprfx z0.d, p0/m, z1.d
+add z0.d, p1/m, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx using a different general predicate
+// CHECK-NEXT: add z0.d, p1/m, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Different general predicate (wide element)
+
+movprfx z0.d, p0/m, z1.d
+asr z0.s, p1/m, z0.s, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx using a different general predicate
+// CHECK-NEXT: asr z0.s, p1/m, z0.s, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Different general predicate (ternary)
+
+movprfx z0.d, p0/m, z1.d
+mla z0.d, p1/m, z1.d, z2.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx using a different general predicate
+// CHECK-NEXT: mla z0.d, p1/m, z1.d, z2.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Different element size (unary)
+
+movprfx z0.s, p0/m, z1.s
+abs z0.d, p0/m, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx with a different element size
+// CHECK-NEXT: abs z0.d, p0/m, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Different element size (binary)
+
+movprfx z0.s, p0/m, z1.s
+add z0.d, p0/m, z0.d, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx with a different element size
+// CHECK-NEXT: add z0.d, p0/m, z0.d, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Different element size (wide element)
+
+movprfx z0.d, p0/m, z1.d
+asr z0.s, p0/m, z0.s, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx with a different element size
+// CHECK-NEXT: asr z0.s, p0/m, z0.s, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Different element size (ternary)
+
+movprfx z0.s, p0/m, z1.s
+mla z0.d, p0/m, z1.d, z2.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx with a different element size
+// CHECK-NEXT: mla z0.d, p0/m, z1.d, z2.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Predicated movprfx with non-predicated instruction.
+
+movprfx z0.d, p0/m, z1.d
+add z0.d, z0.d, #1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: add z0.d, z0.d, #1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Ensure we don't try to apply a prefix to subsequent instructions (upon failure)
+
+movprfx z0, z1
+add z0.d, z1.d, z2.d
+add z0.d, z1.d, z2.d
+// CHECK: [[@LINE-2]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: add z0.d, z1.d, z2.d
+// CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}:
+// CHECK: add z0.d, z1.d, z2.d
Added: llvm/trunk/test/MC/AArch64/SVE/movprfx.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/movprfx.s?rev=338261&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/movprfx.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/movprfx.s Mon Jul 30 09:05:45 2018
@@ -0,0 +1,97 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+// This test file is mostly empty because most 'movprfx' tests are embedded
+// with other instructions that are destructive and can be prefixed
+// by the movprfx instruction. A list of destructive instructions
+// is given below by their mnemonic, which have tests in corresponding
+// <mnemonic>.s test files:
+//
+// abs decp fdivr fnmla fsubr mov sdivr sqincw umulh
+// add eon fmad fnmls ftmad msb sdot sqsub uqadd
+// and eor fmax fnmsb incd mul smax sub uqdecd
+// asr ext fmaxnm frecpx inch neg smin subr uqdech
+// asrd fabd fmin frinta incp not smulh sxtb uqdecp
+// asrr fabs fminnm frinti incw orn splice sxth uqdecw
+// bic fadd fmla frintm insr orr sqadd sxtw uqincd
+// clasta fcadd fmls frintn lsl rbit sqdecd uabd uqinch
+// clastb fcmla fmov frintp lslr revb sqdech ucvtf uqincp
+// cls fcpy fmsb frintx lsr revh sqdecp udiv uqincw
+// clz fcvt fmul frintz lsrr revw sqdecw udivr uqsub
+// cnot fcvtzs fmulx fscale mad sabd sqincd udot uxtb
+// cnt fcvtzu fneg fsqrt mla scvtf sqinch umax uxth
+// cpy fdiv fnmad fsub mls sdiv sqincp umin uxtw
+
+
+// ------------------------------------------------------------------------- //
+// Test compatibility with MOVPRFX instruction with BRK and HLT.
+//
+// Section 7.1.2 of the SVE Architecture Reference Manual Supplement:
+// "it is permitted to use MOVPRFX to prefix an A64 BRK or HLT instruction"
+
+movprfx z0, z1
+// CHECK-INST: movprfx z0, z1
+// CHECK-ENCODING: [0x20,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 bc 20 04 <unknown>
+
+hlt #1
+// CHECK-INST: hlt #0x1
+// CHECK-ENCODING: [0x20,0x00,0x40,0xd4]
+
+movprfx z0.d, p0/z, z1.d
+// CHECK-INST: movprfx z0.d, p0/z, z1.d
+// CHECK-ENCODING: [0x20,0x20,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 20 d0 04 <unknown>
+
+hlt #1
+// CHECK-INST: hlt #0x1
+// CHECK-ENCODING: [0x20,0x00,0x40,0xd4]
+
+movprfx z0, z1
+// CHECK-INST: movprfx z0, z1
+// CHECK-ENCODING: [0x20,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 bc 20 04 <unknown>
+
+brk #1
+// CHECK-INST: brk #0x1
+// CHECK-ENCODING: [0x20,0x00,0x20,0xd4]
+
+movprfx z0.d, p0/z, z1.d
+// CHECK-INST: movprfx z0.d, p0/z, z1.d
+// CHECK-ENCODING: [0x20,0x20,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 20 d0 04 <unknown>
+
+brk #1
+// CHECK-INST: brk #0x1
+// CHECK-ENCODING: [0x20,0x00,0x20,0xd4]
+
+// ------------------------------------------------------------------------- //
+// Ensure we don't try to apply a prefix to subsequent instructions (upon success)
+
+movprfx z0, z1
+// CHECK-INST: movprfx z0, z1
+// CHECK-ENCODING: [0x20,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 bc 20 04 <unknown>
+
+add z0.d, p0/m, z0.d, z1.d
+// CHECK-INST: add z0.d, p0/m, z0.d, z1.d
+// CHECK-ENCODING: [0x20,0x00,0xc0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 00 c0 04 <unknown>
+
+add z0.d, p0/m, z0.d, z1.d
+// CHECK-INST: add z0.d, p0/m, z0.d, z1.d
+// CHECK-ENCODING: [0x20,0x00,0xc0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 00 c0 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/msb.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/msb.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/msb.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/msb.s Mon Jul 30 09:05:45 2018
@@ -30,3 +30,31 @@ msb z0.d, p7/m, z1.d, z31.d
// CHECK-ENCODING: [0xe0,0xff,0xc1,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 ff c1 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+msb z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: msb z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0xe0,0xff,0xc1,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 ff c1 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+msb z0.d, p7/m, z1.d, z31.d
+// CHECK-INST: msb z0.d, p7/m, z1.d, z31.d
+// CHECK-ENCODING: [0xe0,0xff,0xc1,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 ff c1 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/mul-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/mul-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/mul-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/mul-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -36,3 +36,13 @@ mul z0.b, p8/m, z0.b, z1.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: mul z0.b, p8/m, z0.b, z1.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+mul z31.d, z31.d, #127
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: mul z31.d, z31.d, #127
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/mul.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/mul.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/mul.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/mul.s Mon Jul 30 09:05:45 2018
@@ -78,3 +78,43 @@ mul z31.d, z31.d, #127
// CHECK-ENCODING: [0xff,0xcf,0xf0,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff cf f0 25 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+mul z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: mul z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x1f,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f d0 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+mul z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: mul z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x1f,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f d0 04 <unknown>
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+mul z31.d, z31.d, #127
+// CHECK-INST: mul z31.d, z31.d, #127
+// CHECK-ENCODING: [0xff,0xcf,0xf0,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff cf f0 25 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/neg.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/neg.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/neg.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/neg.s Mon Jul 30 09:05:45 2018
@@ -54,3 +54,31 @@ neg z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xd7,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf d7 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+neg z4.d, p7/m, z31.d
+// CHECK-INST: neg z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xd7,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf d7 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+neg z4.d, p7/m, z31.d
+// CHECK-INST: neg z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xd7,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf d7 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/not.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/not.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/not.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/not.s Mon Jul 30 09:05:45 2018
@@ -42,3 +42,31 @@ not p15.b, p15/z, p15.b
// CHECK-ENCODING: [0xef,0x7f,0x0f,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ef 7f 0f 25 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+not z4.d, p7/m, z31.d
+// CHECK-INST: not z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xde,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf de 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+not z4.d, p7/m, z31.d
+// CHECK-INST: not z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xde,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf de 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/orn-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/orn-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/orn-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/orn-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -77,3 +77,13 @@ orn p0.b, p0/m, p1.b, p2.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: orn p0.b, p0/m, p1.b, p2.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+orn z0.d, z0.d, #0x6
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: orn z0.d, z0.d, #0x6
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/orn.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/orn.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/orn.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/orn.s Mon Jul 30 09:05:45 2018
@@ -66,3 +66,19 @@ orn p15.b, p15/z, p15.b, p15.b
// CHECK-ENCODING: [0xff,0x7d,0x8f,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 7d 8f 25 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+orn z0.d, z0.d, #0x6
+// CHECK-INST: orr z0.d, z0.d, #0xfffffffffffffff9
+// CHECK-ENCODING: [0xa0,0xef,0x03,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: a0 ef 03 05 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/orr-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/orr-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/orr-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/orr-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -92,3 +92,37 @@ orr p0.b, p0/m, p1.b, p2.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: orr p0.b, p0/m, p1.b, p2.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+orr z0.d, z0.d, #0x6
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: orr z0.d, z0.d, #0x6
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z23.d, p0/z, z30.d
+orr z23.d, z13.d, z8.d // should not use mov-alias
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: orr z23.d, z13.d, z8.d // should not use mov-alias
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z23, z30
+orr z23.d, z13.d, z8.d // should not use mov-alias
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: orr z23.d, z13.d, z8.d // should not use mov-alias
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+orr z0.d, z0.d, z0.d // should use mov-alias
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: orr z0.d, z0.d, z0.d // should use mov-alias
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+orr z0.d, z0.d, z0.d // should use mov-alias
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: orr z0.d, z0.d, z0.d // should use mov-alias
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/orr.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/orr.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/orr.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/orr.s Mon Jul 30 09:05:45 2018
@@ -110,3 +110,43 @@ orr p15.b, p15/z, p15.b, p15.b
// CHECK-ENCODING: [0xef,0x7d,0x8f,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ef 7d 8f 25 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+orr z4.d, p7/m, z4.d, z31.d
+// CHECK-INST: orr z4.d, p7/m, z4.d, z31.d
+// CHECK-ENCODING: [0xe4,0x1f,0xd8,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 1f d8 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+orr z4.d, p7/m, z4.d, z31.d
+// CHECK-INST: orr z4.d, p7/m, z4.d, z31.d
+// CHECK-ENCODING: [0xe4,0x1f,0xd8,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 1f d8 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+orr z0.d, z0.d, #0x6
+// CHECK-INST: orr z0.d, z0.d, #0x6
+// CHECK-ENCODING: [0x20,0xf8,0x03,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 f8 03 05 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/orv-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/orv-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/orv-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/orv-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -31,4 +31,19 @@ orv v0.2d, p7, z31.d
orv h0, p8, z31.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: orv h0, p8, z31.h
-// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
\ No newline at end of file
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+orv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: orv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+orv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: orv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/prfb-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/prfb-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/prfb-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/prfb-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -128,3 +128,19 @@ prfb #0, p8, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: prfb #0, p8, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+prfb pldl1keep, p0, [x0, z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: prfb pldl1keep, p0, [x0, z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+prfb pldl1keep, p0, [x0, z0.d]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: prfb pldl1keep, p0, [x0, z0.d]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/prfd-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/prfd-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/prfd-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/prfd-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -114,3 +114,19 @@ prfd #0, p8, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: prfd #0, p8, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+prfd pldl1keep, p0, [x0, z0.d, lsl #3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: prfd pldl1keep, p0, [x0, z0.d, lsl #3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+prfd pldl1keep, p0, [x0, z0.d, lsl #3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: prfd pldl1keep, p0, [x0, z0.d, lsl #3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/prfh-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/prfh-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/prfh-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/prfh-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -153,3 +153,19 @@ prfh #0, p8, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: prfh #0, p8, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+prfh pldl1keep, p0, [x0, z0.d, lsl #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: prfh pldl1keep, p0, [x0, z0.d, lsl #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+prfh pldl1keep, p0, [x0, z0.d, lsl #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: prfh pldl1keep, p0, [x0, z0.d, lsl #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/prfw-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/prfw-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/prfw-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/prfw-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -154,3 +154,31 @@ prfw #0, p8, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: prfw #0, p8, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z8.d, p3/z, z15.d
+prfw #7, p3, [x13, z8.d, uxtw #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: prfw #7, p3, [x13, z8.d, uxtw #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z8, z15
+prfw #7, p3, [x13, z8.d, uxtw #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: prfw #7, p3, [x13, z8.d, uxtw #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21.d, p5/z, z28.d
+prfw pldl3strm, p5, [x10, z21.d, lsl #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: prfw pldl3strm, p5, [x10, z21.d, lsl #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+prfw pldl3strm, p5, [x10, z21.d, lsl #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: prfw pldl3strm, p5, [x10, z21.d, lsl #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/rbit.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/rbit.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/rbit.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/rbit.s Mon Jul 30 09:05:45 2018
@@ -30,3 +30,31 @@ rbit z0.d, p7/m, z31.d
// CHECK-ENCODING: [0xe0,0x9f,0xe7,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 9f e7 05 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+rbit z0.d, p7/m, z31.d
+// CHECK-INST: rbit z0.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xe7,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f e7 05 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+rbit z0.d, p7/m, z31.d
+// CHECK-INST: rbit z0.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xe7,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f e7 05 <unknown>
Added: llvm/trunk/test/MC/AArch64/SVE/rev-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/rev-diagnostics.s?rev=338261&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/rev-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/rev-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -0,0 +1,17 @@
+// RUN: not llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -mattr=+sve 2>&1 < %s | FileCheck %s
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+rev z0.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: rev z0.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+rev z0.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: rev z0.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/revb.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/revb.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/revb.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/revb.s Mon Jul 30 09:05:45 2018
@@ -24,3 +24,31 @@ revb z0.d, p7/m, z31.d
// CHECK-ENCODING: [0xe0,0x9f,0xe4,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 9f e4 05 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+revb z0.d, p7/m, z31.d
+// CHECK-INST: revb z0.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xe4,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f e4 05 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+revb z0.d, p7/m, z31.d
+// CHECK-INST: revb z0.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xe4,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f e4 05 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/revh.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/revh.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/revh.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/revh.s Mon Jul 30 09:05:45 2018
@@ -18,3 +18,31 @@ revh z0.d, p7/m, z31.d
// CHECK-ENCODING: [0xe0,0x9f,0xe5,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 9f e5 05 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+revh z0.d, p7/m, z31.d
+// CHECK-INST: revh z0.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xe5,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f e5 05 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+revh z0.d, p7/m, z31.d
+// CHECK-INST: revh z0.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xe5,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f e5 05 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/revw.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/revw.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/revw.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/revw.s Mon Jul 30 09:05:45 2018
@@ -12,3 +12,31 @@ revw z0.d, p7/m, z31.d
// CHECK-ENCODING: [0xe0,0x9f,0xe6,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 9f e6 05 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+revw z0.d, p7/m, z31.d
+// CHECK-INST: revw z0.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xe6,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f e6 05 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+revw z0.d, p7/m, z31.d
+// CHECK-INST: revw z0.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe0,0x9f,0xe6,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 9f e6 05 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/sabd.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sabd.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sabd.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sabd.s Mon Jul 30 09:05:45 2018
@@ -30,3 +30,31 @@ sabd z31.d, p7/m, z31.d, z31.d
// CHECK-ENCODING: [0xff,0x1f,0xcc,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 1f cc 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+sabd z4.d, p7/m, z4.d, z31.d
+// CHECK-INST: sabd z4.d, p7/m, z4.d, z31.d
+// CHECK-ENCODING: [0xe4,0x1f,0xcc,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 1f cc 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+sabd z4.d, p7/m, z4.d, z31.d
+// CHECK-INST: sabd z4.d, p7/m, z4.d, z31.d
+// CHECK-ENCODING: [0xe4,0x1f,0xcc,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 1f cc 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/saddv-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/saddv-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/saddv-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/saddv-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -31,4 +31,19 @@ saddv d0, p7, z31.d
saddv d0, p8, z31.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: saddv d0, p8, z31.b
-// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
\ No newline at end of file
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.s, p7/z, z6.s
+saddv d0, p7, z31.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: saddv d0, p7, z31.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+saddv d0, p7, z31.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: saddv d0, p7, z31.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/scvtf.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/scvtf.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/scvtf.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/scvtf.s Mon Jul 30 09:05:45 2018
@@ -48,3 +48,31 @@ scvtf z0.d, p0/m, z0.d
// CHECK-ENCODING: [0x00,0xa0,0xd6,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 00 a0 d6 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z5.d, p0/z, z7.d
+// CHECK-INST: movprfx z5.d, p0/z, z7.d
+// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e5 20 d0 04 <unknown>
+
+scvtf z5.d, p0/m, z0.d
+// CHECK-INST: scvtf z5.d, p0/m, z0.d
+// CHECK-ENCODING: [0x05,0xa0,0xd6,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 a0 d6 65 <unknown>
+
+movprfx z5, z7
+// CHECK-INST: movprfx z5, z7
+// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e5 bc 20 04 <unknown>
+
+scvtf z5.d, p0/m, z0.d
+// CHECK-INST: scvtf z5.d, p0/m, z0.d
+// CHECK-ENCODING: [0x05,0xa0,0xd6,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 a0 d6 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/sdiv.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sdiv.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sdiv.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sdiv.s Mon Jul 30 09:05:45 2018
@@ -18,3 +18,31 @@ sdiv z0.d, p7/m, z0.d, z31.d
// CHECK-ENCODING: [0xe0,0x1f,0xd4,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 1f d4 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+sdiv z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: sdiv z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x1f,0xd4,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f d4 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sdiv z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: sdiv z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x1f,0xd4,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f d4 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/sdivr.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sdivr.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sdivr.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sdivr.s Mon Jul 30 09:05:45 2018
@@ -18,3 +18,31 @@ sdivr z0.d, p7/m, z0.d, z31.d
// CHECK-ENCODING: [0xe0,0x1f,0xd6,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 1f d6 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+sdivr z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: sdivr z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x1f,0xd6,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f d6 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sdivr z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: sdivr z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x1f,0xd6,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f d6 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/sdot-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sdot-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sdot-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sdot-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -56,3 +56,19 @@ sdot z0.d, z1.h, z15.h[2]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1].
// CHECK-NEXT: sdot z0.d, z1.h, z15.h[2]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+sdot z0.d, z1.h, z31.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sdot z0.d, z1.h, z31.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+sdot z0.d, z1.h, z15.h[1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sdot z0.d, z1.h, z15.h[1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/sdot.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sdot.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sdot.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sdot.s Mon Jul 30 09:05:45 2018
@@ -30,3 +30,31 @@ sdot z0.d, z1.h, z15.h[1]
// CHECK-ENCODING: [0x20,0x00,0xff,0x44]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 20 00 ff 44 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sdot z0.d, z1.h, z31.h
+// CHECK-INST: sdot z0.d, z1.h, z31.h
+// CHECK-ENCODING: [0x20,0x00,0xdf,0x44]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 00 df 44 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sdot z0.d, z1.h, z15.h[1]
+// CHECK-INST: sdot z0.d, z1.h, z15.h[1]
+// CHECK-ENCODING: [0x20,0x00,0xff,0x44]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 00 ff 44 <unknown>
Added: llvm/trunk/test/MC/AArch64/SVE/sel-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sel-diagnostics.s?rev=338261&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sel-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/sel-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -0,0 +1,17 @@
+// RUN: not llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -mattr=+sve 2>&1 < %s | FileCheck %s
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z28.b, p7/z, z30.b
+sel z28.b, p7, z13.b, z8.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: sel z28.b, p7, z13.b, z8.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z23, z30
+sel z23.b, p11, z13.b, z8.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: sel z23.b, p11, z13.b, z8.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/smax-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/smax-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/smax-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/smax-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -14,3 +14,13 @@ smax z0.b, p8/m, z0.b, z0.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: smax z0.b, p8/m, z0.b, z0.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+smax z31.d, z31.d, #127
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: smax z31.d, z31.d, #127
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/smax.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/smax.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/smax.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/smax.s Mon Jul 30 09:05:45 2018
@@ -78,3 +78,43 @@ smax z31.d, p7/m, z31.d, z31.d
// CHECK-ENCODING: [0xff,0x1f,0xc8,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 1f c8 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+smax z4.d, p7/m, z4.d, z31.d
+// CHECK-INST: smax z4.d, p7/m, z4.d, z31.d
+// CHECK-ENCODING: [0xe4,0x1f,0xc8,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 1f c8 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+smax z4.d, p7/m, z4.d, z31.d
+// CHECK-INST: smax z4.d, p7/m, z4.d, z31.d
+// CHECK-ENCODING: [0xe4,0x1f,0xc8,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 1f c8 04 <unknown>
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+smax z31.d, z31.d, #127
+// CHECK-INST: smax z31.d, z31.d, #127
+// CHECK-ENCODING: [0xff,0xcf,0xe8,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff cf e8 25 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/smaxv-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/smaxv-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/smaxv-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/smaxv-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -31,4 +31,19 @@ smaxv v0.2d, p7, z31.d
smaxv h0, p8, z31.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: smaxv h0, p8, z31.h
-// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
\ No newline at end of file
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+smaxv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: smaxv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+smaxv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: smaxv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/smin-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/smin-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/smin-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/smin-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -14,3 +14,13 @@ smin z0.b, p8/m, z0.b, z0.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: smin z0.b, p8/m, z0.b, z0.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+smin z31.d, z31.d, #127
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: smin z31.d, z31.d, #127
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/smin.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/smin.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/smin.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/smin.s Mon Jul 30 09:05:45 2018
@@ -78,3 +78,43 @@ smin z31.d, p7/m, z31.d, z31.d
// CHECK-ENCODING: [0xff,0x1f,0xca,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 1f ca 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+smin z4.d, p7/m, z4.d, z31.d
+// CHECK-INST: smin z4.d, p7/m, z4.d, z31.d
+// CHECK-ENCODING: [0xe4,0x1f,0xca,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 1f ca 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+smin z4.d, p7/m, z4.d, z31.d
+// CHECK-INST: smin z4.d, p7/m, z4.d, z31.d
+// CHECK-ENCODING: [0xe4,0x1f,0xca,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 1f ca 04 <unknown>
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+smin z31.d, z31.d, #127
+// CHECK-INST: smin z31.d, z31.d, #127
+// CHECK-ENCODING: [0xff,0xcf,0xea,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff cf ea 25 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/sminv-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sminv-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sminv-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sminv-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -31,4 +31,19 @@ sminv v0.2d, p7, z31.d
sminv h0, p8, z31.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: sminv h0, p8, z31.h
-// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
\ No newline at end of file
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+sminv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: sminv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+sminv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: sminv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/smulh.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/smulh.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/smulh.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/smulh.s Mon Jul 30 09:05:45 2018
@@ -30,3 +30,31 @@ smulh z0.d, p7/m, z0.d, z31.d
// CHECK-ENCODING: [0xe0,0x1f,0xd2,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 1f d2 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+smulh z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: smulh z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x1f,0xd2,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f d2 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+smulh z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: smulh z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x1f,0xd2,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f d2 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/splice-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/splice-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/splice-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/splice-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -25,3 +25,13 @@ splice z0.b, p8, z0.b, z1.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: splice z0.b, p8, z0.b, z1.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z4.d, p7/z, z6.d
+splice z4.d, p7, z4.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: splice z4.d, p7, z4.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/splice.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/splice.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/splice.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/splice.s Mon Jul 30 09:05:45 2018
@@ -30,3 +30,19 @@ splice z31.d, p7, z31.d, z31.d
// CHECK-ENCODING: [0xff,0x9f,0xec,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 9f ec 05 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+splice z4.d, p7, z4.d, z31.d
+// CHECK-INST: splice z4.d, p7, z4.d, z31.d
+// CHECK-ENCODING: [0xe4,0x9f,0xec,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 9f ec 05 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/sqadd-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqadd-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqadd-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sqadd-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -86,3 +86,25 @@ sqadd z0.d, z0.d, #65536
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
// CHECK-NEXT: sqadd z0.d, z0.d, #65536
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+sqadd z31.d, z31.d, #65280
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sqadd z31.d, z31.d, #65280
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+sqadd z0.d, z0.d, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: sqadd z0.d, z0.d, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+sqadd z0.d, z0.d, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: sqadd z0.d, z0.d, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/sqadd.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqadd.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqadd.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sqadd.s Mon Jul 30 09:05:45 2018
@@ -115,3 +115,19 @@ sqadd z31.d, z31.d, #65280
// CHECK-ENCODING: [0xff,0xff,0xe4,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff ff e4 25 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+sqadd z31.d, z31.d, #65280
+// CHECK-INST: sqadd z31.d, z31.d, #65280
+// CHECK-ENCODING: [0xff,0xff,0xe4,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff e4 25 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/sqdecd-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqdecd-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqdecd-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sqdecd-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -79,3 +79,25 @@ sqdecd x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: sqdecd x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+sqdecd z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sqdecd z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+sqdecd z0.d, pow2, mul #16
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sqdecd z0.d, pow2, mul #16
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+sqdecd z0.d, pow2
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sqdecd z0.d, pow2
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/sqdecd.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqdecd.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqdecd.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sqdecd.s Mon Jul 30 09:05:45 2018
@@ -294,3 +294,43 @@ sqdecd x0, #28
// CHECK-ENCODING: [0x80,0xfb,0xf0,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 80 fb f0 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sqdecd z0.d
+// CHECK-INST: sqdecd z0.d
+// CHECK-ENCODING: [0xe0,0xcb,0xe0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 cb e0 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sqdecd z0.d, pow2, mul #16
+// CHECK-INST: sqdecd z0.d, pow2, mul #16
+// CHECK-ENCODING: [0x00,0xc8,0xef,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c8 ef 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sqdecd z0.d, pow2
+// CHECK-INST: sqdecd z0.d, pow2
+// CHECK-ENCODING: [0x00,0xc8,0xe0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c8 e0 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/sqdech-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqdech-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqdech-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sqdech-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -79,3 +79,25 @@ sqdech x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: sqdech x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.h, p0/z, z7.h
+sqdech z0.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sqdech z0.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.h, p0/z, z7.h
+sqdech z0.h, pow2, mul #16
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sqdech z0.h, pow2, mul #16
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.h, p0/z, z7.h
+sqdech z0.h, pow2
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sqdech z0.h, pow2
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/sqdech.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqdech.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqdech.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sqdech.s Mon Jul 30 09:05:45 2018
@@ -294,3 +294,43 @@ sqdech x0, #28
// CHECK-ENCODING: [0x80,0xfb,0x70,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 80 fb 70 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sqdech z0.h
+// CHECK-INST: sqdech z0.h
+// CHECK-ENCODING: [0xe0,0xcb,0x60,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 cb 60 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sqdech z0.h, pow2, mul #16
+// CHECK-INST: sqdech z0.h, pow2, mul #16
+// CHECK-ENCODING: [0x00,0xc8,0x6f,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c8 6f 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sqdech z0.h, pow2
+// CHECK-INST: sqdech z0.h, pow2
+// CHECK-ENCODING: [0x00,0xc8,0x60,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c8 60 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/sqdecp-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqdecp-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqdecp-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sqdecp-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -51,3 +51,13 @@ sqdecp x0, p0.q
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
// CHECK-NEXT: sqdecp x0, p0.q
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+sqdecp z0.d, p0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sqdecp z0.d, p0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/sqdecp.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqdecp.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqdecp.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sqdecp.s Mon Jul 30 09:05:45 2018
@@ -72,3 +72,19 @@ sqdecp z0.d, p0
// CHECK-ENCODING: [0x00,0x80,0xea,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 00 80 ea 25 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sqdecp z0.d, p0
+// CHECK-INST: sqdecp z0.d, p0
+// CHECK-ENCODING: [0x00,0x80,0xea,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 80 ea 25 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/sqdecw-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqdecw-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqdecw-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sqdecw-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -79,3 +79,25 @@ sqdecw x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: sqdecw x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.s, p0/z, z7.s
+sqdecw z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sqdecw z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+sqdecw z0.s, pow2, mul #16
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sqdecw z0.s, pow2, mul #16
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+sqdecw z0.s, pow2
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sqdecw z0.s, pow2
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/sqdecw.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqdecw.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqdecw.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sqdecw.s Mon Jul 30 09:05:45 2018
@@ -294,3 +294,43 @@ sqdecw x0, #28
// CHECK-ENCODING: [0x80,0xfb,0xb0,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 80 fb b0 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sqdecw z0.s
+// CHECK-INST: sqdecw z0.s
+// CHECK-ENCODING: [0xe0,0xcb,0xa0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 cb a0 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sqdecw z0.s, pow2, mul #16
+// CHECK-INST: sqdecw z0.s, pow2, mul #16
+// CHECK-ENCODING: [0x00,0xc8,0xaf,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c8 af 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sqdecw z0.s, pow2
+// CHECK-INST: sqdecw z0.s, pow2
+// CHECK-ENCODING: [0x00,0xc8,0xa0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c8 a0 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/sqincd-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqincd-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqincd-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sqincd-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -79,3 +79,25 @@ sqincd x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: sqincd x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+sqincd z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sqincd z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+sqincd z0.d, pow2, mul #16
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sqincd z0.d, pow2, mul #16
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+sqincd z0.d, pow2
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sqincd z0.d, pow2
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/sqincd.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqincd.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqincd.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sqincd.s Mon Jul 30 09:05:45 2018
@@ -294,3 +294,43 @@ sqincd x0, #28
// CHECK-ENCODING: [0x80,0xf3,0xf0,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 80 f3 f0 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sqincd z0.d
+// CHECK-INST: sqincd z0.d
+// CHECK-ENCODING: [0xe0,0xc3,0xe0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 c3 e0 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sqincd z0.d, pow2, mul #16
+// CHECK-INST: sqincd z0.d, pow2, mul #16
+// CHECK-ENCODING: [0x00,0xc0,0xef,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 ef 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sqincd z0.d, pow2
+// CHECK-INST: sqincd z0.d, pow2
+// CHECK-ENCODING: [0x00,0xc0,0xe0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 e0 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/sqinch-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqinch-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqinch-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sqinch-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -79,3 +79,25 @@ sqinch x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: sqinch x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.h, p0/z, z7.h
+sqinch z0.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sqinch z0.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.h, p0/z, z7.h
+sqinch z0.h, pow2, mul #16
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sqinch z0.h, pow2, mul #16
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.h, p0/z, z7.h
+sqinch z0.h, pow2
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sqinch z0.h, pow2
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/sqinch.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqinch.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqinch.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sqinch.s Mon Jul 30 09:05:45 2018
@@ -294,3 +294,43 @@ sqinch x0, #28
// CHECK-ENCODING: [0x80,0xf3,0x70,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 80 f3 70 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sqinch z0.h
+// CHECK-INST: sqinch z0.h
+// CHECK-ENCODING: [0xe0,0xc3,0x60,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 c3 60 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sqinch z0.h, pow2, mul #16
+// CHECK-INST: sqinch z0.h, pow2, mul #16
+// CHECK-ENCODING: [0x00,0xc0,0x6f,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 6f 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sqinch z0.h, pow2
+// CHECK-INST: sqinch z0.h, pow2
+// CHECK-ENCODING: [0x00,0xc0,0x60,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 60 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/sqincp-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqincp-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqincp-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sqincp-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -46,3 +46,13 @@ uqdecp x0, p0.q
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
// CHECK-NEXT: uqdecp x0, p0.q
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+sqincp z0.d, p0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sqincp z0.d, p0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/sqincp.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqincp.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqincp.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sqincp.s Mon Jul 30 09:05:45 2018
@@ -72,3 +72,19 @@ sqincp z0.d, p0
// CHECK-ENCODING: [0x00,0x80,0xe8,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 00 80 e8 25 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sqincp z0.d, p0
+// CHECK-INST: sqincp z0.d, p0
+// CHECK-ENCODING: [0x00,0x80,0xe8,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 80 e8 25 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/sqincw-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqincw-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqincw-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sqincw-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -79,3 +79,25 @@ sqincw x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: sqincw x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.s, p0/z, z7.s
+sqincw z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sqincw z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+sqincw z0.s, pow2, mul #16
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sqincw z0.s, pow2, mul #16
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+sqincw z0.s, pow2
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sqincw z0.s, pow2
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/sqincw.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqincw.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqincw.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sqincw.s Mon Jul 30 09:05:45 2018
@@ -294,3 +294,43 @@ sqincw x0, #28
// CHECK-ENCODING: [0x80,0xf3,0xb0,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 80 f3 b0 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sqincw z0.s
+// CHECK-INST: sqincw z0.s
+// CHECK-ENCODING: [0xe0,0xc3,0xa0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 c3 a0 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sqincw z0.s, pow2, mul #16
+// CHECK-INST: sqincw z0.s, pow2, mul #16
+// CHECK-ENCODING: [0x00,0xc0,0xaf,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 af 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+sqincw z0.s, pow2
+// CHECK-INST: sqincw z0.s, pow2
+// CHECK-ENCODING: [0x00,0xc0,0xa0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c0 a0 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/sqsub-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqsub-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqsub-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sqsub-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -86,3 +86,25 @@ sqsub z0.d, z0.d, #65536
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
// CHECK-NEXT: sqsub z0.d, z0.d, #65536
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+sqsub z31.d, z31.d, #65280
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sqsub z31.d, z31.d, #65280
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+sqsub z0.d, z0.d, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: sqsub z0.d, z0.d, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+sqsub z0.d, z0.d, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: sqsub z0.d, z0.d, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/sqsub.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sqsub.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sqsub.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sqsub.s Mon Jul 30 09:05:45 2018
@@ -115,3 +115,19 @@ sqsub z31.d, z31.d, #65280
// CHECK-ENCODING: [0xff,0xff,0xe6,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff ff e6 25 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+sqsub z31.d, z31.d, #65280
+// CHECK-INST: sqsub z31.d, z31.d, #65280
+// CHECK-ENCODING: [0xff,0xff,0xe6,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff e6 25 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/st1b-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/st1b-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/st1b-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/st1b-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -175,3 +175,19 @@ st1b z0.d, p0, [z0.d, #32]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31].
// CHECK-NEXT: st1b z0.d, p0, [z0.d, #32]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+st1b { z31.d }, p7, [z31.d, #31]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st1b { z31.d }, p7, [z31.d, #31]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+st1b { z31.d }, p7, [z31.d, #31]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st1b { z31.d }, p7, [z31.d, #31]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/st1d-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/st1d-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/st1d-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/st1d-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -131,3 +131,19 @@ st1d z0.d, p0, [z0.d, #3]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 8 in range [0, 248].
// CHECK-NEXT: st1d z0.d, p0, [z0.d, #3]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+st1d { z31.d }, p7, [z31.d, #248]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st1d { z31.d }, p7, [z31.d, #248]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+st1d { z31.d }, p7, [z31.d, #248]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st1d { z31.d }, p7, [z31.d, #248]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/st1h-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/st1h-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/st1h-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/st1h-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -189,3 +189,19 @@ st1h z0.d, p0, [z0.d, #3]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62].
// CHECK-NEXT: st1h z0.d, p0, [z0.d, #3]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+st1h { z31.d }, p7, [z31.d, #62]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st1h { z31.d }, p7, [z31.d, #62]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+st1h { z31.d }, p7, [z31.d, #62]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st1h { z31.d }, p7, [z31.d, #62]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/st1w-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/st1w-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/st1w-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/st1w-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -178,3 +178,19 @@ st1w z0.d, p0, [z0.d, #3]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124].
// CHECK-NEXT: st1w z0.d, p0, [z0.d, #3]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+st1w { z31.d }, p7, [z31.d, #124]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st1w { z31.d }, p7, [z31.d, #124]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+st1w { z31.d }, p7, [z31.d, #124]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st1w { z31.d }, p7, [z31.d, #124]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/st2b-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/st2b-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/st2b-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/st2b-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -89,3 +89,19 @@ st2b { v0.2d, v1.2d }, p0, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: st2b { v0.2d, v1.2d }, p0, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.b, p5/z, z28.b
+st2b { z21.b, z22.b }, p5, [x10, #10, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st2b { z21.b, z22.b }, p5, [x10, #10, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+st2b { z21.b, z22.b }, p5, [x10, #10, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st2b { z21.b, z22.b }, p5, [x10, #10, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/st2d-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/st2d-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/st2d-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/st2d-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -94,3 +94,19 @@ st2d { v0.2d, v1.2d }, p0, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: st2d { v0.2d, v1.2d }, p0, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.d, p5/z, z28.d
+st2d { z21.d, z22.d }, p5, [x10, #10, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st2d { z21.d, z22.d }, p5, [x10, #10, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+st2d { z21.d, z22.d }, p5, [x10, #10, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st2d { z21.d, z22.d }, p5, [x10, #10, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/st2h-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/st2h-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/st2h-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/st2h-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -94,3 +94,19 @@ st2h { v0.2d, v1.2d }, p0, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: st2h { v0.2d, v1.2d }, p0, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.h, p5/z, z28.h
+st2h { z21.h, z22.h }, p5, [x10, #10, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st2h { z21.h, z22.h }, p5, [x10, #10, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+st2h { z21.h, z22.h }, p5, [x10, #10, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st2h { z21.h, z22.h }, p5, [x10, #10, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/st2w-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/st2w-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/st2w-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/st2w-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -94,3 +94,19 @@ st2w { v0.2d, v1.2d }, p0, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: st2w { v0.2d, v1.2d }, p0, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.s, p5/z, z28.s
+st2w { z21.s, z22.s }, p5, [x10, #10, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st2w { z21.s, z22.s }, p5, [x10, #10, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+st2w { z21.s, z22.s }, p5, [x10, #10, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st2w { z21.s, z22.s }, p5, [x10, #10, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/st3b-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/st3b-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/st3b-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/st3b-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -89,3 +89,19 @@ st3b { v0.16b, v1.16b, v2.16b }, p0, [x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: st3b { v0.16b, v1.16b, v2.16b }, p0, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.b, p5/z, z28.b
+st3b { z21.b, z22.b, z23.b }, p5, [x10, #15, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st3b { z21.b, z22.b, z23.b }, p5, [x10, #15, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+st3b { z21.b, z22.b, z23.b }, p5, [x10, #15, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st3b { z21.b, z22.b, z23.b }, p5, [x10, #15, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/st3d-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/st3d-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/st3d-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/st3d-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -94,3 +94,19 @@ st3d { v0.2d, v1.2d, v2.2d }, p0, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: st3d { v0.2d, v1.2d, v2.2d }, p0, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.d, p5/z, z28.d
+st3d { z21.d, z22.d, z23.d }, p5, [x10, #15, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st3d { z21.d, z22.d, z23.d }, p5, [x10, #15, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+st3d { z21.d, z22.d, z23.d }, p5, [x10, #15, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st3d { z21.d, z22.d, z23.d }, p5, [x10, #15, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/st3h-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/st3h-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/st3h-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/st3h-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -94,3 +94,19 @@ st3h { v0.8h, v1.8h, v2.8h }, p0, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: st3h { v0.8h, v1.8h, v2.8h }, p0, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.h, p5/z, z28.h
+st3h { z21.h, z22.h, z23.h }, p5, [x10, #15, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st3h { z21.h, z22.h, z23.h }, p5, [x10, #15, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+st3h { z21.h, z22.h, z23.h }, p5, [x10, #15, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st3h { z21.h, z22.h, z23.h }, p5, [x10, #15, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/st3w-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/st3w-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/st3w-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/st3w-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -94,3 +94,19 @@ st3w { v0.4s, v1.4s, v2.4s }, p0, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: st3w { v0.4s, v1.4s, v2.4s }, p0, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.s, p5/z, z28.s
+st3w { z21.s, z22.s, z23.s }, p5, [x10, #15, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st3w { z21.s, z22.s, z23.s }, p5, [x10, #15, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+st3w { z21.s, z22.s, z23.s }, p5, [x10, #15, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st3w { z21.s, z22.s, z23.s }, p5, [x10, #15, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/st4b-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/st4b-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/st4b-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/st4b-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -89,3 +89,19 @@ st4b { v0.16b, v1.16b, v2.16b }, p0, [x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: st4b { v0.16b, v1.16b, v2.16b }, p0, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.b, p5/z, z28.b
+st4b { z21.b, z22.b, z23.b, z24.b }, p5, [x10, #20, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st4b { z21.b, z22.b, z23.b, z24.b }, p5, [x10, #20, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+st4b { z21.b, z22.b, z23.b, z24.b }, p5, [x10, #20, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st4b { z21.b, z22.b, z23.b, z24.b }, p5, [x10, #20, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/st4d-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/st4d-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/st4d-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/st4d-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -95,3 +95,19 @@ st4d { v0.2d, v1.2d, v2.2d }, p0, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: st4d { v0.2d, v1.2d, v2.2d }, p0, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.d, p5/z, z28.d
+st4d { z21.d, z22.d, z23.d, z24.d }, p5, [x10, #20, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st4d { z21.d, z22.d, z23.d, z24.d }, p5, [x10, #20, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+st4d { z21.d, z22.d, z23.d, z24.d }, p5, [x10, #20, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st4d { z21.d, z22.d, z23.d, z24.d }, p5, [x10, #20, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/st4h-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/st4h-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/st4h-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/st4h-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -94,3 +94,19 @@ st4h { v0.8h, v1.8h, v2.8h }, p0, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: st4h { v0.8h, v1.8h, v2.8h }, p0, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.h, p5/z, z28.h
+st4h { z21.h, z22.h, z23.h, z24.h }, p5, [x10, #20, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st4h { z21.h, z22.h, z23.h, z24.h }, p5, [x10, #20, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+st4h { z21.h, z22.h, z23.h, z24.h }, p5, [x10, #20, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st4h { z21.h, z22.h, z23.h, z24.h }, p5, [x10, #20, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/st4w-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/st4w-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/st4w-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/st4w-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -94,3 +94,19 @@ st4w { v0.4s, v1.4s, v2.4s }, p0, [x0]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: st4w { v0.4s, v1.4s, v2.4s }, p0, [x0]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z21.s, p5/z, z28.s
+st4w { z21.s, z22.s, z23.s, z24.s }, p5, [x10, #20, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st4w { z21.s, z22.s, z23.s, z24.s }, p5, [x10, #20, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z21, z28
+st4w { z21.s, z22.s, z23.s, z24.s }, p5, [x10, #20, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: st4w { z21.s, z22.s, z23.s, z24.s }, p5, [x10, #20, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/stnt1b-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/stnt1b-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/stnt1b-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/stnt1b-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -64,3 +64,19 @@ stnt1b { v0.2d }, p0, [x1, #1, MUL VL]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: stnt1b { v0.2d }, p0, [x1, #1, MUL VL]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.b, p0/z, z7.b
+stnt1b { z0.b }, p0, [x0, x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: stnt1b { z0.b }, p0, [x0, x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+stnt1b { z0.b }, p0, [x0, x0]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: stnt1b { z0.b }, p0, [x0, x0]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/stnt1d-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/stnt1d-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/stnt1d-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/stnt1d-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -64,3 +64,19 @@ stnt1d { v0.2d }, p0, [x1, #1, MUL VL]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: stnt1d { v0.2d }, p0, [x1, #1, MUL VL]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+stnt1d { z0.d }, p0, [x0, x0, lsl #3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: stnt1d { z0.d }, p0, [x0, x0, lsl #3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+stnt1d { z0.d }, p0, [x0, x0, lsl #3]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: stnt1d { z0.d }, p0, [x0, x0, lsl #3]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/stnt1h-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/stnt1h-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/stnt1h-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/stnt1h-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -64,3 +64,19 @@ stnt1h { v0.2d }, p0, [x1, #1, MUL VL]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: stnt1h { v0.2d }, p0, [x1, #1, MUL VL]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.h, p0/z, z7.h
+stnt1h { z0.h }, p0, [x0, x0, lsl #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: stnt1h { z0.h }, p0, [x0, x0, lsl #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+stnt1h { z0.h }, p0, [x0, x0, lsl #1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: stnt1h { z0.h }, p0, [x0, x0, lsl #1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/stnt1w-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/stnt1w-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/stnt1w-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/stnt1w-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -64,3 +64,19 @@ stnt1w { v0.2d }, p0, [x1, #1, MUL VL]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: stnt1w { v0.2d }, p0, [x1, #1, MUL VL]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.s, p0/z, z7.s
+stnt1w { z0.s }, p0, [x0, x0, lsl #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: stnt1w { z0.s }, p0, [x0, x0, lsl #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+stnt1w { z0.s }, p0, [x0, x0, lsl #2]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: stnt1w { z0.s }, p0, [x0, x0, lsl #2]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/sub-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sub-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sub-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sub-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -144,3 +144,25 @@ sub z0.d, z0.d, #65536
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
// CHECK-NEXT: sub z0.d, z0.d, #65536
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+sub z31.d, z31.d, #65280
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: sub z31.d, z31.d, #65280
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31.s, p0/z, z6.s
+sub z31.s, z31.s, z31.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: sub z31.s, z31.s, z31.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+sub z31.s, z31.s, z31.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: sub z31.s, z31.s, z31.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/sub.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sub.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sub.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sub.s Mon Jul 30 09:05:45 2018
@@ -286,3 +286,43 @@ sub z31.d, z31.d, #65280
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff ff e1 25 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z23.b, p3/z, z30.b
+// CHECK-INST: movprfx z23.b, p3/z, z30.b
+// CHECK-ENCODING: [0xd7,0x2f,0x10,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: d7 2f 10 04 <unknown>
+
+sub z23.b, p3/m, z23.b, z13.b
+// CHECK-INST: sub z23.b, p3/m, z23.b, z13.b
+// CHECK-ENCODING: [0xb7,0x0d,0x01,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: b7 0d 01 04 <unknown>
+
+movprfx z23, z30
+// CHECK-INST: movprfx z23, z30
+// CHECK-ENCODING: [0xd7,0xbf,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: d7 bf 20 04 <unknown>
+
+sub z23.b, p3/m, z23.b, z13.b
+// CHECK-INST: sub z23.b, p3/m, z23.b, z13.b
+// CHECK-ENCODING: [0xb7,0x0d,0x01,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: b7 0d 01 04 <unknown>
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+sub z31.d, z31.d, #65280
+// CHECK-INST: sub z31.d, z31.d, #65280
+// CHECK-ENCODING: [0xff,0xff,0xe1,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff e1 25 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/subr-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/subr-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/subr-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/subr-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -138,3 +138,13 @@ subr z0.d, z0.d, #65536
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
// CHECK-NEXT: subr z0.d, z0.d, #65536
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+subr z31.d, z31.d, #65280
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: subr z31.d, z31.d, #65280
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/subr.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/subr.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/subr.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/subr.s Mon Jul 30 09:05:45 2018
@@ -115,3 +115,43 @@ subr z31.d, z31.d, #65280
// CHECK-ENCODING: [0xff,0xff,0xe3,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff ff e3 25 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z5.d, p0/z, z7.d
+// CHECK-INST: movprfx z5.d, p0/z, z7.d
+// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e5 20 d0 04 <unknown>
+
+subr z5.d, p0/m, z5.d, z0.d
+// CHECK-INST: subr z5.d, p0/m, z5.d, z0.d
+// CHECK-ENCODING: [0x05,0x00,0xc3,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 00 c3 04 <unknown>
+
+movprfx z5, z7
+// CHECK-INST: movprfx z5, z7
+// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e5 bc 20 04 <unknown>
+
+subr z5.d, p0/m, z5.d, z0.d
+// CHECK-INST: subr z5.d, p0/m, z5.d, z0.d
+// CHECK-ENCODING: [0x05,0x00,0xc3,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 00 c3 04 <unknown>
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+subr z31.d, z31.d, #65280
+// CHECK-INST: subr z31.d, z31.d, #65280
+// CHECK-ENCODING: [0xff,0xff,0xe3,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff e3 25 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/sunpkhi-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sunpkhi-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sunpkhi-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sunpkhi-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -18,3 +18,19 @@ sunpkhi z0.d, z0.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: sunpkhi z0.d, z0.h
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+sunpkhi z31.d, z31.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: sunpkhi z31.d, z31.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+sunpkhi z31.d, z31.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: sunpkhi z31.d, z31.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/sunpklo-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sunpklo-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sunpklo-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sunpklo-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -18,3 +18,19 @@ sunpklo z0.d, z0.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: sunpklo z0.d, z0.h
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+sunpklo z31.d, z31.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: sunpklo z31.d, z31.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+sunpklo z31.d, z31.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: sunpklo z31.d, z31.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/sxtb.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sxtb.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sxtb.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sxtb.s Mon Jul 30 09:05:45 2018
@@ -42,3 +42,31 @@ sxtb z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xd0,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf d0 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+sxtb z4.d, p7/m, z31.d
+// CHECK-INST: sxtb z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf d0 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+sxtb z4.d, p7/m, z31.d
+// CHECK-INST: sxtb z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf d0 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/sxth.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sxth.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sxth.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sxth.s Mon Jul 30 09:05:45 2018
@@ -30,3 +30,31 @@ sxth z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xd2,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf d2 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+sxth z4.d, p7/m, z31.d
+// CHECK-INST: sxth z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xd2,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf d2 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+sxth z4.d, p7/m, z31.d
+// CHECK-INST: sxth z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xd2,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf d2 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/sxtw.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/sxtw.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/sxtw.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/sxtw.s Mon Jul 30 09:05:45 2018
@@ -18,3 +18,31 @@ sxtw z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xd4,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf d4 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+sxtw z4.d, p7/m, z31.d
+// CHECK-INST: sxtw z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xd4,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf d4 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+sxtw z4.d, p7/m, z31.d
+// CHECK-INST: sxtw z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xd4,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf d4 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/tbl-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/tbl-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/tbl-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/tbl-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -9,3 +9,19 @@ tbl { z0.h }, z0.h, z0.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector register expected
// CHECK-NEXT: tbl { z0.h }, z0.h, z0.h
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+tbl z31.d, { z31.d }, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: tbl z31.d, { z31.d }, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+tbl z31.d, { z31.d }, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: tbl z31.d, { z31.d }, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/trn1-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/trn1-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/trn1-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/trn1-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -41,3 +41,19 @@ trn1 p1.s, p2.s, z3.s
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: trn1 p1.s, p2.s, z3.s
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+trn1 z31.d, z31.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: trn1 z31.d, z31.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+trn1 z31.d, z31.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: trn1 z31.d, z31.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/trn2-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/trn2-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/trn2-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/trn2-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -41,3 +41,19 @@ trn2 p1.s, p2.s, z3.s
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: trn2 p1.s, p2.s, z3.s
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+trn2 z31.d, z31.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: trn2 z31.d, z31.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+trn2 z31.d, z31.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: trn2 z31.d, z31.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/uabd.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uabd.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uabd.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uabd.s Mon Jul 30 09:05:45 2018
@@ -30,3 +30,31 @@ uabd z31.d, p7/m, z31.d, z31.d
// CHECK-ENCODING: [0xff,0x1f,0xcd,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 1f cd 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+uabd z4.d, p7/m, z4.d, z31.d
+// CHECK-INST: uabd z4.d, p7/m, z4.d, z31.d
+// CHECK-ENCODING: [0xe4,0x1f,0xcd,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 1f cd 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+uabd z4.d, p7/m, z4.d, z31.d
+// CHECK-INST: uabd z4.d, p7/m, z4.d, z31.d
+// CHECK-ENCODING: [0xe4,0x1f,0xcd,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 1f cd 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/uaddv-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uaddv-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uaddv-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uaddv-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -26,4 +26,19 @@ uaddv s0, p7, z31.s
uaddv d0, p8, z31.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: uaddv d0, p8, z31.b
-// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
\ No newline at end of file
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+uaddv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: uaddv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+uaddv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: uaddv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/ucvtf.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/ucvtf.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/ucvtf.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/ucvtf.s Mon Jul 30 09:05:45 2018
@@ -48,3 +48,31 @@ ucvtf z0.d, p0/m, z0.d
// CHECK-ENCODING: [0x00,0xa0,0xd7,0x65]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 00 a0 d7 65 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z5.d, p0/z, z7.d
+// CHECK-INST: movprfx z5.d, p0/z, z7.d
+// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e5 20 d0 04 <unknown>
+
+ucvtf z5.d, p0/m, z0.d
+// CHECK-INST: ucvtf z5.d, p0/m, z0.d
+// CHECK-ENCODING: [0x05,0xa0,0xd7,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 a0 d7 65 <unknown>
+
+movprfx z5, z7
+// CHECK-INST: movprfx z5, z7
+// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e5 bc 20 04 <unknown>
+
+ucvtf z5.d, p0/m, z0.d
+// CHECK-INST: ucvtf z5.d, p0/m, z0.d
+// CHECK-ENCODING: [0x05,0xa0,0xd7,0x65]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 05 a0 d7 65 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/udiv.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/udiv.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/udiv.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/udiv.s Mon Jul 30 09:05:45 2018
@@ -18,3 +18,31 @@ udiv z0.d, p7/m, z0.d, z31.d
// CHECK-ENCODING: [0xe0,0x1f,0xd5,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 1f d5 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+udiv z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: udiv z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x1f,0xd5,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f d5 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+udiv z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: udiv z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x1f,0xd5,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f d5 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/udivr.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/udivr.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/udivr.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/udivr.s Mon Jul 30 09:05:45 2018
@@ -18,3 +18,31 @@ udivr z0.d, p7/m, z0.d, z31.d
// CHECK-ENCODING: [0xe0,0x1f,0xd7,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 1f d7 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+udivr z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: udivr z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x1f,0xd7,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f d7 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+udivr z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: udivr z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x1f,0xd7,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f d7 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/udot-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/udot-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/udot-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/udot-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -56,3 +56,19 @@ udot z0.d, z1.h, z15.h[2]
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1].
// CHECK-NEXT: udot z0.d, z1.h, z15.h[2]
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+udot z0.d, z1.h, z31.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: udot z0.d, z1.h, z31.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+udot z0.d, z1.h, z15.h[1]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: udot z0.d, z1.h, z15.h[1]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/udot.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/udot.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/udot.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/udot.s Mon Jul 30 09:05:45 2018
@@ -30,3 +30,31 @@ udot z0.d, z1.h, z15.h[1]
// CHECK-ENCODING: [0x20,0x04,0xff,0x44]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 20 04 ff 44 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+udot z0.d, z1.h, z31.h
+// CHECK-INST: udot z0.d, z1.h, z31.h
+// CHECK-ENCODING: [0x20,0x04,0xdf,0x44]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 04 df 44 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+udot z0.d, z1.h, z15.h[1]
+// CHECK-INST: udot z0.d, z1.h, z15.h[1]
+// CHECK-ENCODING: [0x20,0x04,0xff,0x44]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 20 04 ff 44 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/umax-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/umax-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/umax-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/umax-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -14,3 +14,13 @@ umax z0.b, p8/m, z0.b, z0.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: umax z0.b, p8/m, z0.b, z0.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.b, p0/z, z6.b
+umax z31.b, z31.b, #255
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: umax z31.b, z31.b, #255
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/umax.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/umax.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/umax.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/umax.s Mon Jul 30 09:05:45 2018
@@ -78,3 +78,43 @@ umax z31.d, p7/m, z31.d, z31.d
// CHECK-ENCODING: [0xff,0x1f,0xc9,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 1f c9 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+umax z4.d, p7/m, z4.d, z31.d
+// CHECK-INST: umax z4.d, p7/m, z4.d, z31.d
+// CHECK-ENCODING: [0xe4,0x1f,0xc9,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 1f c9 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+umax z4.d, p7/m, z4.d, z31.d
+// CHECK-INST: umax z4.d, p7/m, z4.d, z31.d
+// CHECK-ENCODING: [0xe4,0x1f,0xc9,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 1f c9 04 <unknown>
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+umax z31.b, z31.b, #255
+// CHECK-INST: umax z31.b, z31.b, #255
+// CHECK-ENCODING: [0xff,0xdf,0x29,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff df 29 25 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/umaxv-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/umaxv-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/umaxv-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/umaxv-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -31,4 +31,19 @@ umaxv v0.2d, p7, z31.d
umaxv h0, p8, z31.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: umaxv h0, p8, z31.h
-// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
\ No newline at end of file
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+umaxv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: umaxv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+umaxv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: umaxv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/umin-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/umin-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/umin-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/umin-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -14,3 +14,13 @@ umin z0.b, p8/m, z0.b, z0.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: umin z0.b, p8/m, z0.b, z0.b
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.b, p0/z, z6.b
+umin z31.b, z31.b, #255
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: umin z31.b, z31.b, #255
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/umin.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/umin.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/umin.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/umin.s Mon Jul 30 09:05:45 2018
@@ -78,3 +78,43 @@ umin z31.d, p7/m, z31.d, z31.d
// CHECK-ENCODING: [0xff,0x1f,0xcb,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 1f cb 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+umin z4.d, p7/m, z4.d, z31.d
+// CHECK-INST: umin z4.d, p7/m, z4.d, z31.d
+// CHECK-ENCODING: [0xe4,0x1f,0xcb,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 1f cb 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+umin z4.d, p7/m, z4.d, z31.d
+// CHECK-INST: umin z4.d, p7/m, z4.d, z31.d
+// CHECK-ENCODING: [0xe4,0x1f,0xcb,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 1f cb 04 <unknown>
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+umin z31.b, z31.b, #255
+// CHECK-INST: umin z31.b, z31.b, #255
+// CHECK-ENCODING: [0xff,0xdf,0x2b,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff df 2b 25 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/uminv-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uminv-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uminv-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uminv-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -31,4 +31,19 @@ uminv v0.2d, p7, z31.d
uminv h0, p8, z31.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
// CHECK-NEXT: uminv h0, p8, z31.h
-// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
\ No newline at end of file
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p7/z, z6.d
+uminv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: uminv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+uminv d0, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: uminv d0, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/umulh.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/umulh.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/umulh.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/umulh.s Mon Jul 30 09:05:45 2018
@@ -30,3 +30,31 @@ umulh z0.d, p7/m, z0.d, z31.d
// CHECK-ENCODING: [0xe0,0x1f,0xd3,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: e0 1f d3 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0.d, p7/z, z7.d
+// CHECK-INST: movprfx z0.d, p7/z, z7.d
+// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
+
+umulh z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: umulh z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x1f,0xd3,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f d3 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+umulh z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: umulh z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x1f,0xd3,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f d3 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/uqadd-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqadd-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqadd-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uqadd-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -86,3 +86,25 @@ uqadd z0.d, z0.d, #65536
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
// CHECK-NEXT: uqadd z0.d, z0.d, #65536
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+uqadd z31.d, z31.d, #65280
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: uqadd z31.d, z31.d, #65280
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+uqadd z0.d, z0.d, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: uqadd z0.d, z0.d, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+uqadd z0.d, z0.d, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: uqadd z0.d, z0.d, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/uqadd.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqadd.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqadd.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uqadd.s Mon Jul 30 09:05:45 2018
@@ -115,3 +115,19 @@ uqadd z31.d, z31.d, #65280
// CHECK-ENCODING: [0xff,0xff,0xe5,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff ff e5 25 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+uqadd z31.d, z31.d, #65280
+// CHECK-INST: uqadd z31.d, z31.d, #65280
+// CHECK-ENCODING: [0xff,0xff,0xe5,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff e5 25 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/uqdecd-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqdecd-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqdecd-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uqdecd-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -79,3 +79,25 @@ uqdecd x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: uqdecd x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+uqdecd z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: uqdecd z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+uqdecd z0.d, pow2, mul #16
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: uqdecd z0.d, pow2, mul #16
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+uqdecd z0.d, pow2
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: uqdecd z0.d, pow2
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/uqdecd.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqdecd.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqdecd.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uqdecd.s Mon Jul 30 09:05:45 2018
@@ -294,3 +294,43 @@ uqdecd x0, #28
// CHECK-ENCODING: [0x80,0xff,0xf0,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 80 ff f0 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+uqdecd z0.d
+// CHECK-INST: uqdecd z0.d
+// CHECK-ENCODING: [0xe0,0xcf,0xe0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 cf e0 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+uqdecd z0.d, pow2, mul #16
+// CHECK-INST: uqdecd z0.d, pow2, mul #16
+// CHECK-ENCODING: [0x00,0xcc,0xef,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 cc ef 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+uqdecd z0.d, pow2
+// CHECK-INST: uqdecd z0.d, pow2
+// CHECK-ENCODING: [0x00,0xcc,0xe0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 cc e0 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/uqdech-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqdech-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqdech-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uqdech-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -79,3 +79,25 @@ uqdech x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: uqdech x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.h, p0/z, z7.h
+uqdech z0.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: uqdech z0.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.h, p0/z, z7.h
+uqdech z0.h, pow2, mul #16
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: uqdech z0.h, pow2, mul #16
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.h, p0/z, z7.h
+uqdech z0.h, pow2
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: uqdech z0.h, pow2
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/uqdech.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqdech.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqdech.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uqdech.s Mon Jul 30 09:05:45 2018
@@ -294,3 +294,43 @@ uqdech x0, #28
// CHECK-ENCODING: [0x80,0xff,0x70,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 80 ff 70 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+uqdech z0.h
+// CHECK-INST: uqdech z0.h
+// CHECK-ENCODING: [0xe0,0xcf,0x60,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 cf 60 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+uqdech z0.h, pow2, mul #16
+// CHECK-INST: uqdech z0.h, pow2, mul #16
+// CHECK-ENCODING: [0x00,0xcc,0x6f,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 cc 6f 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+uqdech z0.h, pow2
+// CHECK-INST: uqdech z0.h, pow2
+// CHECK-ENCODING: [0x00,0xcc,0x60,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 cc 60 04 <unknown>
Added: llvm/trunk/test/MC/AArch64/SVE/uqdecp-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqdecp-diagnostics.s?rev=338261&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqdecp-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/uqdecp-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -0,0 +1,11 @@
+// RUN: not llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -mattr=+sve 2>&1 < %s | FileCheck %s
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+uqdecp z0.d, p0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: uqdecp z0.d, p0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/uqdecp.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqdecp.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqdecp.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uqdecp.s Mon Jul 30 09:05:45 2018
@@ -72,3 +72,19 @@ uqdecp z0.d, p0
// CHECK-ENCODING: [0x00,0x80,0xeb,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 00 80 eb 25 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+uqdecp z0.d, p0
+// CHECK-INST: uqdecp z0.d, p0
+// CHECK-ENCODING: [0x00,0x80,0xeb,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 80 eb 25 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/uqdecw-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqdecw-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqdecw-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uqdecw-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -79,3 +79,25 @@ uqdecw x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: uqdecw x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.s, p0/z, z7.s
+uqdecw z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: uqdecw z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+uqdecw z0.s, pow2, mul #16
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: uqdecw z0.s, pow2, mul #16
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+uqdecw z0.s, pow2
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: uqdecw z0.s, pow2
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/uqdecw.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqdecw.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqdecw.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uqdecw.s Mon Jul 30 09:05:45 2018
@@ -294,3 +294,43 @@ uqdecw x0, #28
// CHECK-ENCODING: [0x80,0xff,0xb0,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 80 ff b0 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+uqdecw z0.s
+// CHECK-INST: uqdecw z0.s
+// CHECK-ENCODING: [0xe0,0xcf,0xa0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 cf a0 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+uqdecw z0.s, pow2, mul #16
+// CHECK-INST: uqdecw z0.s, pow2, mul #16
+// CHECK-ENCODING: [0x00,0xcc,0xaf,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 cc af 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+uqdecw z0.s, pow2
+// CHECK-INST: uqdecw z0.s, pow2
+// CHECK-ENCODING: [0x00,0xcc,0xa0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 cc a0 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/uqincd-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqincd-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqincd-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uqincd-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -79,3 +79,25 @@ uqincd x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: uqincd x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+uqincd z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: uqincd z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+uqincd z0.d, pow2, mul #16
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: uqincd z0.d, pow2, mul #16
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+uqincd z0.d, pow2
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: uqincd z0.d, pow2
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/uqincd.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqincd.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqincd.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uqincd.s Mon Jul 30 09:05:45 2018
@@ -294,3 +294,43 @@ uqincd x0, #28
// CHECK-ENCODING: [0x80,0xf7,0xf0,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 80 f7 f0 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+uqincd z0.d
+// CHECK-INST: uqincd z0.d
+// CHECK-ENCODING: [0xe0,0xc7,0xe0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 c7 e0 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+uqincd z0.d, pow2, mul #16
+// CHECK-INST: uqincd z0.d, pow2, mul #16
+// CHECK-ENCODING: [0x00,0xc4,0xef,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c4 ef 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+uqincd z0.d, pow2
+// CHECK-INST: uqincd z0.d, pow2
+// CHECK-ENCODING: [0x00,0xc4,0xe0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c4 e0 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/uqinch-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqinch-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqinch-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uqinch-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -79,3 +79,25 @@ uqinch x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: uqinch x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.h, p0/z, z7.h
+uqinch z0.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: uqinch z0.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.h, p0/z, z7.h
+uqinch z0.h, pow2, mul #16
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: uqinch z0.h, pow2, mul #16
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.h, p0/z, z7.h
+uqinch z0.h, pow2
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: uqinch z0.h, pow2
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/uqinch.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqinch.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqinch.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uqinch.s Mon Jul 30 09:05:45 2018
@@ -296,3 +296,43 @@ uqinch x0, #28
// CHECK-ENCODING: [0x80,0xf7,0x70,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 80 f7 70 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+uqinch z0.h
+// CHECK-INST: uqinch z0.h
+// CHECK-ENCODING: [0xe0,0xc7,0x60,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 c7 60 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+uqinch z0.h, pow2, mul #16
+// CHECK-INST: uqinch z0.h, pow2, mul #16
+// CHECK-ENCODING: [0x00,0xc4,0x6f,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c4 6f 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+uqinch z0.h, pow2
+// CHECK-INST: uqinch z0.h, pow2
+// CHECK-ENCODING: [0x00,0xc4,0x60,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c4 60 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/uqincp-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqincp-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqincp-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uqincp-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -46,3 +46,13 @@ uqincp x0, p0.q
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
// CHECK-NEXT: uqincp x0, p0.q
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.d, p0/z, z7.d
+uqincp z0.d, p0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: uqincp z0.d, p0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/uqincp.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqincp.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqincp.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uqincp.s Mon Jul 30 09:05:45 2018
@@ -72,3 +72,19 @@ uqincp z0.d, p0
// CHECK-ENCODING: [0x00,0x80,0xe9,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 00 80 e9 25 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+uqincp z0.d, p0
+// CHECK-INST: uqincp z0.d, p0
+// CHECK-ENCODING: [0x00,0x80,0xe9,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 80 e9 25 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/uqincw-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqincw-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqincw-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uqincw-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -79,3 +79,25 @@ uqincw x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: uqincw x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z0.s, p0/z, z7.s
+uqincw z0.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: uqincw z0.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+uqincw z0.s, pow2, mul #16
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: uqincw z0.s, pow2, mul #16
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.s, p0/z, z7.s
+uqincw z0.s, pow2
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: uqincw z0.s, pow2
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/uqincw.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqincw.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqincw.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uqincw.s Mon Jul 30 09:05:45 2018
@@ -294,3 +294,43 @@ uqincw x0, #28
// CHECK-ENCODING: [0x80,0xf7,0xb0,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 80 f7 b0 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+uqincw z0.s
+// CHECK-INST: uqincw z0.s
+// CHECK-ENCODING: [0xe0,0xc7,0xa0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 c7 a0 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+uqincw z0.s, pow2, mul #16
+// CHECK-INST: uqincw z0.s, pow2, mul #16
+// CHECK-ENCODING: [0x00,0xc4,0xaf,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c4 af 04 <unknown>
+
+movprfx z0, z7
+// CHECK-INST: movprfx z0, z7
+// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
+
+uqincw z0.s, pow2
+// CHECK-INST: uqincw z0.s, pow2
+// CHECK-ENCODING: [0x00,0xc4,0xa0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 c4 a0 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/uqsub-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqsub-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqsub-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uqsub-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -86,3 +86,25 @@ uqsub z0.d, z0.d, #65536
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
// CHECK-NEXT: uqsub z0.d, z0.d, #65536
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+uqsub z31.d, z31.d, #65280
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
+// CHECK-NEXT: uqsub z31.d, z31.d, #65280
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0.d, p0/z, z7.d
+uqsub z0.d, z0.d, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: uqsub z0.d, z0.d, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z0, z7
+uqsub z0.d, z0.d, z0.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: uqsub z0.d, z0.d, z0.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/uqsub.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uqsub.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uqsub.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uqsub.s Mon Jul 30 09:05:45 2018
@@ -115,3 +115,19 @@ uqsub z31.d, z31.d, #65280
// CHECK-ENCODING: [0xff,0xff,0xe7,0x25]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff ff e7 25 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z31, z6
+// CHECK-INST: movprfx z31, z6
+// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: df bc 20 04 <unknown>
+
+uqsub z31.d, z31.d, #65280
+// CHECK-INST: uqsub z31.d, z31.d, #65280
+// CHECK-ENCODING: [0xff,0xff,0xe7,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff ff e7 25 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/uunpkhi-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uunpkhi-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uunpkhi-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uunpkhi-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -18,3 +18,19 @@ uunpkhi z0.d, z0.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: uunpkhi z0.d, z0.h
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+uunpkhi z31.d, z31.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: uunpkhi z31.d, z31.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+uunpkhi z31.d, z31.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: uunpkhi z31.d, z31.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/uunpklo-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uunpklo-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uunpklo-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uunpklo-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -18,3 +18,19 @@ uunpklo z0.d, z0.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
// CHECK-NEXT: uunpklo z0.d, z0.h
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+uunpklo z31.d, z31.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: uunpklo z31.d, z31.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+uunpklo z31.d, z31.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: uunpklo z31.d, z31.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/uxtb.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uxtb.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uxtb.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uxtb.s Mon Jul 30 09:05:45 2018
@@ -42,3 +42,31 @@ uxtb z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xd1,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf d1 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+uxtb z4.d, p7/m, z31.d
+// CHECK-INST: uxtb z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xd1,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf d1 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+uxtb z4.d, p7/m, z31.d
+// CHECK-INST: uxtb z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xd1,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf d1 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/uxth.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uxth.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uxth.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uxth.s Mon Jul 30 09:05:45 2018
@@ -30,3 +30,31 @@ uxth z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xd3,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf d3 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+uxth z4.d, p7/m, z31.d
+// CHECK-INST: uxth z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xd3,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf d3 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+uxth z4.d, p7/m, z31.d
+// CHECK-INST: uxth z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xd3,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf d3 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/uxtw.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uxtw.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uxtw.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uxtw.s Mon Jul 30 09:05:45 2018
@@ -18,3 +18,31 @@ uxtw z31.d, p7/m, z31.d
// CHECK-ENCODING: [0xff,0xbf,0xd5,0x04]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff bf d5 04 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.d, p7/z, z6.d
+// CHECK-INST: movprfx z4.d, p7/z, z6.d
+// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
+
+uxtw z4.d, p7/m, z31.d
+// CHECK-INST: uxtw z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xd5,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf d5 04 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+uxtw z4.d, p7/m, z31.d
+// CHECK-INST: uxtw z4.d, p7/m, z31.d
+// CHECK-ENCODING: [0xe4,0xbf,0xd5,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e4 bf d5 04 <unknown>
Modified: llvm/trunk/test/MC/AArch64/SVE/uzp1-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uzp1-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uzp1-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uzp1-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -41,3 +41,19 @@ uzp1 p1.s, p2.s, z3.s
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: uzp1 p1.s, p2.s, z3.s
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+uzp1 z31.d, z31.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: uzp1 z31.d, z31.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+uzp1 z31.d, z31.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: uzp1 z31.d, z31.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/uzp2-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/uzp2-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/uzp2-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/uzp2-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -41,3 +41,19 @@ uzp2 p1.s, p2.s, z3.s
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: uzp2 p1.s, p2.s, z3.s
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+uzp2 z31.d, z31.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: uzp2 z31.d, z31.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+uzp2 z31.d, z31.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: uzp2 z31.d, z31.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/zip1-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/zip1-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/zip1-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/zip1-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -41,3 +41,19 @@ zip1 p1.s, p2.s, z3.s
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: zip1 p1.s, p2.s, z3.s
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+zip1 z31.d, z31.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: zip1 z31.d, z31.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+zip1 z31.d, z31.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: zip1 z31.d, z31.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Modified: llvm/trunk/test/MC/AArch64/SVE/zip2-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/zip2-diagnostics.s?rev=338261&r1=338260&r2=338261&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/zip2-diagnostics.s (original)
+++ llvm/trunk/test/MC/AArch64/SVE/zip2-diagnostics.s Mon Jul 30 09:05:45 2018
@@ -41,3 +41,19 @@ zip2 p1.s, p2.s, z3.s
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: zip2 p1.s, p2.s, z3.s
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Negative tests for instructions that are incompatible with movprfx
+
+movprfx z31.d, p0/z, z6.d
+zip2 z31.d, z31.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: zip2 z31.d, z31.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+movprfx z31, z6
+zip2 z31.d, z31.d, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
+// CHECK-NEXT: zip2 z31.d, z31.d, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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