[PATCH] D49924: [DAGCombiner] transform sub-of-shifted-signbit to add

[Sanjay Patel via Phabricator via llvm-commits]

spatel added reviewers: dmgreen, aemerson, evandro, fhahn.
spatel added a comment.

In https://reviews.llvm.org/D49924#1180044, @lebedev.ri wrote:

> The code+x86 test change looks ok to me.


Thanks!

> In aarch64 case, as far as i can tell, the main change is that we avoided having to materialize the immediate in register,
>  although i'm not sure why we no longer fuse the shift into `Operand2` of `add`/`sub`, commutativity overlook?
>  https://godbolt.org/g/yAFJS4 - but i don't think i'm comparing them correctly, that syntax is rather alien to me.
>  So yeah, not sure about aarch64.

Let me add some more ARM experts to see if we can get an answer on those test diffs; I don't know if we can trust llvm-mca for aarch yet.


https://reviews.llvm.org/D49924