[llvm] r338218 - [InstSimplify] fold funnel shifts with 0-shift amount
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Sun Jul 29 09:36:38 PDT 2018
Author: spatel
Date: Sun Jul 29 09:36:38 2018
New Revision: 338218
URL: http://llvm.org/viewvc/llvm-project?rev=338218&view=rev
Log:
[InstSimplify] fold funnel shifts with 0-shift amount
Modified:
llvm/trunk/lib/Analysis/InstructionSimplify.cpp
llvm/trunk/test/Transforms/InstSimplify/call.ll
Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InstructionSimplify.cpp?rev=338218&r1=338217&r2=338218&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/InstructionSimplify.cpp (original)
+++ llvm/trunk/lib/Analysis/InstructionSimplify.cpp Sun Jul 29 09:36:38 2018
@@ -4775,6 +4775,19 @@ static Value *simplifyIntrinsic(Function
return PassthruArg;
return nullptr;
}
+ case Intrinsic::fshl:
+ case Intrinsic::fshr: {
+ Value *ShAmtArg = ArgBegin[2];
+ const APInt *ShAmtC;
+ if (match(ShAmtArg, m_APInt(ShAmtC))) {
+ // If there's effectively no shift, return the 1st arg or 2nd arg.
+ // TODO: For vectors, we could check each element of a non-splat constant.
+ APInt BitWidth = APInt(ShAmtC->getBitWidth(), ShAmtC->getBitWidth());
+ if (ShAmtC->urem(BitWidth).isNullValue())
+ return ArgBegin[IID == Intrinsic::fshl ? 0 : 1];
+ }
+ return nullptr;
+ }
default:
return nullptr;
}
Modified: llvm/trunk/test/Transforms/InstSimplify/call.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstSimplify/call.ll?rev=338218&r1=338217&r2=338218&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstSimplify/call.ll (original)
+++ llvm/trunk/test/Transforms/InstSimplify/call.ll Sun Jul 29 09:36:38 2018
@@ -454,8 +454,7 @@ declare <2 x i8> @llvm.fshr.v2i8(<2 x i8
define i8 @fshl_no_shift(i8 %x, i8 %y) {
; CHECK-LABEL: @fshl_no_shift(
-; CHECK-NEXT: [[Z:%.*]] = call i8 @llvm.fshl.i8(i8 [[X:%.*]], i8 [[Y:%.*]], i8 0)
-; CHECK-NEXT: ret i8 [[Z]]
+; CHECK-NEXT: ret i8 [[X:%.*]]
;
%z = call i8 @llvm.fshl.i8(i8 %x, i8 %y, i8 0)
ret i8 %z
@@ -463,8 +462,7 @@ define i8 @fshl_no_shift(i8 %x, i8 %y) {
define i9 @fshr_no_shift(i9 %x, i9 %y) {
; CHECK-LABEL: @fshr_no_shift(
-; CHECK-NEXT: [[Z:%.*]] = call i9 @llvm.fshr.i9(i9 [[X:%.*]], i9 [[Y:%.*]], i9 0)
-; CHECK-NEXT: ret i9 [[Z]]
+; CHECK-NEXT: ret i9 [[Y:%.*]]
;
%z = call i9 @llvm.fshr.i9(i9 %x, i9 %y, i9 0)
ret i9 %z
@@ -472,8 +470,7 @@ define i9 @fshr_no_shift(i9 %x, i9 %y) {
define i8 @fshl_no_shift_modulo_bitwidth(i8 %x, i8 %y) {
; CHECK-LABEL: @fshl_no_shift_modulo_bitwidth(
-; CHECK-NEXT: [[Z:%.*]] = call i8 @llvm.fshl.i8(i8 [[X:%.*]], i8 [[Y:%.*]], i8 40)
-; CHECK-NEXT: ret i8 [[Z]]
+; CHECK-NEXT: ret i8 [[X:%.*]]
;
%z = call i8 @llvm.fshl.i8(i8 %x, i8 %y, i8 40)
ret i8 %z
@@ -481,8 +478,7 @@ define i8 @fshl_no_shift_modulo_bitwidth
define i9 @fshr_no_shift_modulo_bitwidth(i9 %x, i9 %y) {
; CHECK-LABEL: @fshr_no_shift_modulo_bitwidth(
-; CHECK-NEXT: [[Z:%.*]] = call i9 @llvm.fshr.i9(i9 [[X:%.*]], i9 [[Y:%.*]], i9 189)
-; CHECK-NEXT: ret i9 [[Z]]
+; CHECK-NEXT: ret i9 [[Y:%.*]]
;
%z = call i9 @llvm.fshr.i9(i9 %x, i9 %y, i9 189)
ret i9 %z
@@ -490,8 +486,7 @@ define i9 @fshr_no_shift_modulo_bitwidth
define <2 x i7> @fshl_no_shift_modulo_bitwidth_splat(<2 x i7> %x, <2 x i7> %y) {
; CHECK-LABEL: @fshl_no_shift_modulo_bitwidth_splat(
-; CHECK-NEXT: [[Z:%.*]] = call <2 x i7> @llvm.fshl.v2i7(<2 x i7> [[X:%.*]], <2 x i7> [[Y:%.*]], <2 x i7> <i7 21, i7 21>)
-; CHECK-NEXT: ret <2 x i7> [[Z]]
+; CHECK-NEXT: ret <2 x i7> [[X:%.*]]
;
%z = call <2 x i7> @llvm.fshl.v2i7(<2 x i7> %x, <2 x i7> %y, <2 x i7> <i7 21, i7 21>)
ret <2 x i7> %z
@@ -499,8 +494,7 @@ define <2 x i7> @fshl_no_shift_modulo_bi
define <2 x i8> @fshr_no_shift_modulo_bitwidth_splat(<2 x i8> %x, <2 x i8> %y) {
; CHECK-LABEL: @fshr_no_shift_modulo_bitwidth_splat(
-; CHECK-NEXT: [[Z:%.*]] = call <2 x i8> @llvm.fshr.v2i8(<2 x i8> [[X:%.*]], <2 x i8> [[Y:%.*]], <2 x i8> <i8 72, i8 72>)
-; CHECK-NEXT: ret <2 x i8> [[Z]]
+; CHECK-NEXT: ret <2 x i8> [[Y:%.*]]
;
%z = call <2 x i8> @llvm.fshr.v2i8(<2 x i8> %x, <2 x i8> %y, <2 x i8> <i8 72, i8 72>)
ret <2 x i8> %z
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