[PATCH] D49861: [X86] Improved sched models for X86 XCHG*rr instructions

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added inline comments.


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Comment at: lib/Target/X86/X86ScheduleBtVer2.td:173
 defm : JWriteResIntPair<WriteBSWAP64,[JALU01], 1>;
+defm : X86WriteRes<WriteXCHG,        [JALU01], 1, [1], 1>;
 
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avt77 wrote:
> lebedev.ri wrote:
> > These are from agner?
> Agner shows different values for r8,r8 and r,r while AMD64_16h_InstrLatency_1.1 shows 'ucode' for all variants. I used the default values because it keeps the current tests untouched. That's our old problem: what should be selected as "right" value?
Ideally - what `llvm-exegesis` says for these.
Realistically, i'd guess the current change - just cleanup, don't change test output - is ok.


https://reviews.llvm.org/D49861