[PATCH] D49924: [DAGCombiner] transform sub-of-shifted-signbit to add

[Sanjay Patel via Phabricator via llvm-commits]

spatel created this revision.
spatel added reviewers: craig.topper, efriedma, lebedev.ri.
Herald added subscribers: kristof.beyls, nemanjai, mcrosier.
Herald added a reviewer: javed.absar.

This is exchanging a sub-of-1 with add-of-minus-1:
https://rise4fun.com/Alive/plKAH

This is another step towards improving select-of-constants codegen (see https://reviews.llvm.org/D48970).

x86 is the motivating target, and those diffs all appear to be wins. PPC looks neutral. I'm not sure about AArch64.
I've limited this to early combining (!LegalOperations) in case a target wants to reverse it, but I think canonicalizing to 'add' is more likely to produce further transforms because we have more folds for 'add'.

Note that we're also missing this canonicalization in IR, but I'm less sure which direction we should go in there. 'lshr' gives us better knownbits, but again the chance of subsequent folds seems more likely with 'add'. We should choose one form or the other.


https://reviews.llvm.org/D49924

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/AArch64/signbit-shift.ll
  test/CodeGen/PowerPC/signbit-shift.ll
  test/CodeGen/X86/signbit-shift.ll

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