[PATCH] D49563: [ARM] Add new target feature to fuse literal generation

[Florian Hahn via Phabricator via llvm-commits]

fhahn accepted this revision.
fhahn added a comment.
This revision is now accepted and ready to land.

LGTM, this is in line with the Cortex-A57 and Cortex-A72 opt guides. We have a similar feature for AArch64 already.



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Comment at: llvm/lib/Target/ARM/ARM.td:145
+// Fast execution of bottom and top halves of literal generation
+def FeatureFuseLiterals   : SubtargetFeature<"fuse-literals", "HasFuseLiterals", "true",
+                                             "CPU fuses literal generation operations">;
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FeatureFuseLiterals should be added to the cortex-a57 and cortex-a72 features according to the optimization guides. Can you also add a run lines with those CPUs to the test?


Repository:
  rL LLVM

https://reviews.llvm.org/D49563