[PATCH] D49671: [SchedModel] Propagate read advance cycles to implicit operands outside instruction descriptor

[Jonas Paulsson via Phabricator via llvm-commits]

jonpa updated this revision to Diff 157691.
jonpa added a comment.

Some tests were crashing. To get all tests are passing I had to:

- Avoid using MI->getMF(), because e.g. machinecombiner will call with an MI that is not contained in any MBB.

- Somehow make sure that this is only done post-RA (since this aims to handle the regalloc operands). Due to the fact that UseMI may not always be part of the MF, MRI is not retrievable, so instead of doing MRI->isSSA() around all of this, I checked for each use operands physical/virtual domain. I wonder how to improve on this...

New test case for SystemZ that tests that the latency adjustment of the read advance is also applied on the register allocator operand. The test case is a bit longer than expected after bugpoint reduction, but I think that's how it has to be to expose this effect of coalescing
into a superregister or something like that... May be able to find a smaller test case...


https://reviews.llvm.org/D49671

Files:
  lib/CodeGen/TargetSchedule.cpp
  test/CodeGen/SystemZ/misched-readadvances.mir

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