[PATCH] D47383: [AMDGPU] Avoid using divergent value in mubuf addr64 descriptor

Nicolai Hähnle via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 27 06:32:44 PDT 2018


nhaehnle added inline comments.


================
Comment at: test/CodeGen/AMDGPU/shader-addr64-nonuniform.ll:26-34
+define amdgpu_ps float @uniform_nonuniform(i32 inreg %offset, i32 %arg18) {
+.entry:
+  %tmp1 = zext i32 %arg18 to i64
+  %tmp2 = inttoptr i64 %tmp1 to [6 x <3 x float>] addrspace(1)*
+  %tmp32 = getelementptr [6 x <3 x float>], [6 x <3 x float>] addrspace(1)* %tmp2, i32 0, i32 %offset
+  %tmp33 = load <3 x float>, <3 x float> addrspace(1)* %tmp32, align 16
+  %tmp34 = extractelement <3 x float> %tmp33, i32 0
----------------
Could you please add a similar test-case, with a non-uniform i64 %arg18 and %offset a constant? I don't think this case is covered by tests, and I'm not sure that the code would do the right thing for that case, where I think Addr64 would also be needed.


Repository:
  rL LLVM

https://reviews.llvm.org/D47383





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