[llvm] r338118 - [InstCombine] not(sub X, Y) --> add (not X), Y
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 27 03:54:48 PDT 2018
Author: spatel
Date: Fri Jul 27 03:54:48 2018
New Revision: 338118
URL: http://llvm.org/viewvc/llvm-project?rev=338118&view=rev
Log:
[InstCombine] not(sub X, Y) --> add (not X), Y
The tests with constants show a missing optimization.
Analysis for adds is better than subs, so this can also
help with other transforms. And codegen is better with
adds for targets like x86 (destructive ops, no sub-from).
https://rise4fun.com/Alive/llK
Modified:
llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
llvm/trunk/test/Transforms/InstCombine/sub-not.ll
llvm/trunk/test/Transforms/InstCombine/vector-xor.ll
Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp?rev=338118&r1=338117&r2=338118&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp Fri Jul 27 03:54:48 2018
@@ -2545,6 +2545,10 @@ Instruction *InstCombiner::visitXor(Bina
}
}
+ // ~(X - Y) --> ~X + Y
+ if (match(NotVal, m_OneUse(m_Sub(m_Value(X), m_Value(Y)))))
+ return BinaryOperator::CreateAdd(Builder.CreateNot(X), Y);
+
// ~(~X >>s Y) --> (X >>s Y)
if (match(NotVal, m_AShr(m_Not(m_Value(X)), m_Value(Y))))
return BinaryOperator::CreateAShr(X, Y);
Modified: llvm/trunk/test/Transforms/InstCombine/sub-not.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/sub-not.ll?rev=338118&r1=338117&r2=338118&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/sub-not.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/sub-not.ll Fri Jul 27 03:54:48 2018
@@ -5,8 +5,8 @@ declare void @use(i8)
define i8 @sub_not(i8 %x, i8 %y) {
; CHECK-LABEL: @sub_not(
-; CHECK-NEXT: [[S:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[R:%.*]] = xor i8 [[S]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[X:%.*]], -1
+; CHECK-NEXT: [[R:%.*]] = add i8 [[TMP1]], [[Y:%.*]]
; CHECK-NEXT: ret i8 [[R]]
;
%s = sub i8 %x, %y
@@ -29,8 +29,8 @@ define i8 @sub_not_extra_use(i8 %x, i8 %
define <2 x i8> @sub_not_vec(<2 x i8> %x, <2 x i8> %y) {
; CHECK-LABEL: @sub_not_vec(
-; CHECK-NEXT: [[S:%.*]] = sub <2 x i8> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[R:%.*]] = xor <2 x i8> [[S]], <i8 -1, i8 undef>
+; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i8> [[X:%.*]], <i8 -1, i8 -1>
+; CHECK-NEXT: [[R:%.*]] = add <2 x i8> [[TMP1]], [[Y:%.*]]
; CHECK-NEXT: ret <2 x i8> [[R]]
;
%s = sub <2 x i8> %x, %y
Modified: llvm/trunk/test/Transforms/InstCombine/vector-xor.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/vector-xor.ll?rev=338118&r1=338117&r2=338118&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/vector-xor.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/vector-xor.ll Fri Jul 27 03:54:48 2018
@@ -194,9 +194,8 @@ define <4 x i32> @test_v4i32_not_sub_spl
define <4 x i32> @test_v4i32_not_sub_const(<4 x i32> %a0) {
; CHECK-LABEL: @test_v4i32_not_sub_const(
-; CHECK-NEXT: [[TMP1:%.*]] = sub <4 x i32> <i32 3, i32 5, i32 -1, i32 15>, [[A0:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = xor <4 x i32> [[TMP1]], <i32 -1, i32 -1, i32 -1, i32 -1>
-; CHECK-NEXT: ret <4 x i32> [[TMP2]]
+; CHECK-NEXT: [[TMP1:%.*]] = add <4 x i32> [[A0:%.*]], <i32 -4, i32 -6, i32 0, i32 -16>
+; CHECK-NEXT: ret <4 x i32> [[TMP1]]
;
%1 = sub <4 x i32> <i32 3, i32 5, i32 -1, i32 15>, %a0
%2 = xor <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, %1
@@ -205,9 +204,8 @@ define <4 x i32> @test_v4i32_not_sub_con
define <4 x i32> @test_v4i32_not_sub_const_undef(<4 x i32> %a0) {
; CHECK-LABEL: @test_v4i32_not_sub_const_undef(
-; CHECK-NEXT: [[TMP1:%.*]] = sub <4 x i32> <i32 3, i32 undef, i32 -1, i32 15>, [[A0:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = xor <4 x i32> [[TMP1]], <i32 -1, i32 -1, i32 -1, i32 undef>
-; CHECK-NEXT: ret <4 x i32> [[TMP2]]
+; CHECK-NEXT: [[TMP1:%.*]] = add <4 x i32> [[A0:%.*]], <i32 -4, i32 undef, i32 0, i32 -16>
+; CHECK-NEXT: ret <4 x i32> [[TMP1]]
;
%1 = sub <4 x i32> <i32 3, i32 undef, i32 -1, i32 15>, %a0
%2 = xor <4 x i32> <i32 -1, i32 -1, i32 -1, i32 undef>, %1
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