[llvm] r338102 - AMDGPU/GlobalISel: Fix crash in regbankselect on non-power-of-2 types

[Tom Stellard via llvm-commits]

Author: tstellar
Date: Thu Jul 26 23:04:40 2018
New Revision: 338102

URL: http://llvm.org/viewvc/llvm-project?rev=338102&view=rev
Log:
AMDGPU/GlobalISel: Fix crash in regbankselect on non-power-of-2 types

Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D49624

Modified:
    llvm/trunk/lib/Target/AMDGPU/AMDGPUGenRegisterBankInfo.def
    llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir

Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUGenRegisterBankInfo.def
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUGenRegisterBankInfo.def?rev=338102&r1=338101&r2=338102&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUGenRegisterBankInfo.def (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUGenRegisterBankInfo.def Thu Jul 26 23:04:40 2018
@@ -96,7 +96,7 @@ const RegisterBankInfo::ValueMapping *ge
     break;
   default:
     Idx = BankID == AMDGPU::VGPRRegBankID ? VGPRStartIdx : SGPRStartIdx;
-    Idx += llvm::countTrailingZeros(Size);
+    Idx += Log2_32_Ceil(Size);
     break;
   }
   return &ValMappings[Idx];

Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir?rev=338102&r1=338101&r2=338102&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir Thu Jul 26 23:04:40 2018
@@ -14,6 +14,7 @@
     %tmp2 = load i32, i32 addrspace(1)* %tmp1
     ret void
   }
+  define void @non_power_of_2() { ret void }
   declare i32 @llvm.amdgcn.workitem.id.x() #0
   attributes #0 = { nounwind readnone }
 ...
@@ -67,3 +68,19 @@ body: |
     %0:_(p1) = COPY $sgpr0_sgpr1
     %1:_(s32) = G_LOAD %0 :: (load 4 from %ir.tmp1)
 ...
+
+---
+name: non_power_of_2
+legalized: true
+
+# CHECK-LABEL: name: non_power_of_2
+# CHECK: [[S448:%[0-9]+]]:sgpr(s448) = G_IMPLICIT_DEF
+# CHECK: sgpr(s32) = G_EXTRACT [[S448]](s448), 0
+
+body: |
+  bb.0:
+    %0:_(s448) = G_IMPLICIT_DEF
+    %1:_(s32) = G_EXTRACT %0:_(s448), 0
+    $sgpr0 = COPY %1:_(s32)
+    SI_RETURN_TO_EPILOG $sgpr0
+...