[PATCH] D49497: [DAGCombine] optimizeSetCCOfSignedTruncationCheck(): handle ule, ugt CondCodes.
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Thu Jul 26 10:34:54 PDT 2018
This revision was automatically updated to reflect the committed changes.
Closed by commit rL338044: [DAGCombine] optimizeSetCCOfSignedTruncationCheck(): handle ule,ugt CondCodes. (authored by lebedevri, committed by ).
Changed prior to commit:
https://reviews.llvm.org/D49497?vs=156104&id=157527#toc
Repository:
rL LLVM
https://reviews.llvm.org/D49497
Files:
llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/trunk/test/CodeGen/AArch64/lack-of-signed-truncation-check.ll
llvm/trunk/test/CodeGen/X86/lack-of-signed-truncation-check.ll
Index: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
===================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -1864,14 +1864,6 @@
SDValue TargetLowering::optimizeSetCCOfSignedTruncationCheck(
EVT SCCVT, SDValue N0, SDValue N1, ISD::CondCode Cond, DAGCombinerInfo &DCI,
const SDLoc &DL) const {
- ISD::CondCode NewCond;
- if (Cond == ISD::CondCode::SETULT)
- NewCond = ISD::CondCode::SETEQ;
- else if (Cond == ISD::CondCode::SETUGE)
- NewCond = ISD::CondCode::SETNE;
- else
- return SDValue();
-
// We must be comparing with a constant.
ConstantSDNode *C1;
if (!(C1 = dyn_cast<ConstantSDNode>(N1)))
@@ -1891,7 +1883,24 @@
// Validate constants ...
- const APInt &I1 = C1->getAPIntValue();
+ APInt I1 = C1->getAPIntValue();
+
+ ISD::CondCode NewCond;
+ if (Cond == ISD::CondCode::SETULT) {
+ NewCond = ISD::CondCode::SETEQ;
+ } else if (Cond == ISD::CondCode::SETULE) {
+ NewCond = ISD::CondCode::SETEQ;
+ // But need to 'canonicalize' the constant.
+ I1 += 1;
+ } else if (Cond == ISD::CondCode::SETUGT) {
+ NewCond = ISD::CondCode::SETNE;
+ // But need to 'canonicalize' the constant.
+ I1 += 1;
+ } else if (Cond == ISD::CondCode::SETUGE) {
+ NewCond = ISD::CondCode::SETNE;
+ } else
+ return SDValue();
+
const APInt &I01 = C01->getAPIntValue();
// Both of them must be power-of-two, and the constant from setcc is bigger.
if (!(I1.ugt(I01) && I1.isPowerOf2() && I01.isPowerOf2()))
Index: llvm/trunk/test/CodeGen/AArch64/lack-of-signed-truncation-check.ll
===================================================================
--- llvm/trunk/test/CodeGen/AArch64/lack-of-signed-truncation-check.ll
+++ llvm/trunk/test/CodeGen/AArch64/lack-of-signed-truncation-check.ll
@@ -257,10 +257,10 @@
define i1 @add_ugtcmp_i16_i8(i16 %x) nounwind {
; CHECK-LABEL: add_ugtcmp_i16_i8:
; CHECK: // %bb.0:
-; CHECK-NEXT: add w8, w0, #128 // =128
+; CHECK-NEXT: sxtb w8, w0
; CHECK-NEXT: and w8, w8, #0xffff
-; CHECK-NEXT: cmp w8, #255 // =255
-; CHECK-NEXT: cset w0, hi
+; CHECK-NEXT: cmp w8, w0, uxth
+; CHECK-NEXT: cset w0, ne
; CHECK-NEXT: ret
%tmp0 = add i16 %x, 128 ; 1U << (8-1)
%tmp1 = icmp ugt i16 %tmp0, 255 ; (1U << 8) - 1
Index: llvm/trunk/test/CodeGen/X86/lack-of-signed-truncation-check.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/lack-of-signed-truncation-check.ll
+++ llvm/trunk/test/CodeGen/X86/lack-of-signed-truncation-check.ll
@@ -422,19 +422,17 @@
define i1 @add_ugtcmp_i16_i8(i16 %x) nounwind {
; X86-LABEL: add_ugtcmp_i16_i8:
; X86: # %bb.0:
-; X86-NEXT: movl $128, %eax
-; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movzwl %ax, %eax
-; X86-NEXT: cmpl $255, %eax
-; X86-NEXT: seta %al
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movsbl %al, %ecx
+; X86-NEXT: cmpw %ax, %cx
+; X86-NEXT: setne %al
; X86-NEXT: retl
;
; X64-LABEL: add_ugtcmp_i16_i8:
; X64: # %bb.0:
-; X64-NEXT: subl $-128, %edi
-; X64-NEXT: movzwl %di, %eax
-; X64-NEXT: cmpl $255, %eax
-; X64-NEXT: seta %al
+; X64-NEXT: movsbl %dil, %eax
+; X64-NEXT: cmpw %di, %ax
+; X64-NEXT: setne %al
; X64-NEXT: retq
%tmp0 = add i16 %x, 128 ; 1U << (8-1)
%tmp1 = icmp ugt i16 %tmp0, 255 ; (1U << 8) - 1
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