[PATCH] D49861: [X86] Improved sched models for X86 XCHG*rr instructions

[Andrew V. Tischenko via Phabricator via llvm-commits]

avt77 created this revision.
avt77 added reviewers: RKSimon, courbet, lebedev.ri, craig.topper, t.p.northover.

This patch improves sched models for XCHG*rr X86 instrs removing unnecessary redefinitions of instr infos. This patch is based on results of https://reviews.llvm.org/D48222.


https://reviews.llvm.org/D49861

Files:
  lib/Target/X86/X86InstrInfo.td
  lib/Target/X86/X86SchedBroadwell.td
  lib/Target/X86/X86SchedHaswell.td
  lib/Target/X86/X86SchedSandyBridge.td
  lib/Target/X86/X86SchedSkylakeClient.td
  lib/Target/X86/X86SchedSkylakeServer.td
  lib/Target/X86/X86Schedule.td
  lib/Target/X86/X86ScheduleAtom.td
  lib/Target/X86/X86ScheduleBtVer2.td
  lib/Target/X86/X86ScheduleSLM.td
  lib/Target/X86/X86ScheduleZnver1.td

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D49861.157497.patch
Type: text/x-patch
Size: 9468 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180726/c714f70b/attachment.bin>