[PATCH] D49598: [SystemZ] Use tablegen loops in SchedModels

Jonas Paulsson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 25 02:28:11 PDT 2018


jonpa updated this revision to Diff 157204.
jonpa added a comment.

For some reason, the built clang binary (with the patch of a few days ago) makes some noise with diff now , but the binaries are of the exact same size, and SPEC output is identical...

Per off-line discussions I have now tried to simplify further the tablegen loops by including in some cases extra unused SchedWrites, e.g. VecBF3, etc. The binary size and SPEC output are still identical, so this looks fine.

We could make the loops even neater by using FXAa1, FXb1, etc... but then we also get a lot of FXa1 with the instructions, which I think is not quite as neat. Personally, I think it looks good as it is now without the FXa1...


https://reviews.llvm.org/D49598

Files:
  lib/Target/SystemZ/SystemZSchedule.td
  lib/Target/SystemZ/SystemZScheduleZ13.td
  lib/Target/SystemZ/SystemZScheduleZ14.td
  lib/Target/SystemZ/SystemZScheduleZ196.td
  lib/Target/SystemZ/SystemZScheduleZEC12.td

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