[llvm] r337874 - [X86] Expand mul by pow2 + 2 using a shift and two adds similar to what we do for pow2 - 2.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 24 18:15:36 PDT 2018
Author: ctopper
Date: Tue Jul 24 18:15:35 2018
New Revision: 337874
URL: http://llvm.org/viewvc/llvm-project?rev=337874&view=rev
Log:
[X86] Expand mul by pow2 + 2 using a shift and two adds similar to what we do for pow2 - 2.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/test/CodeGen/X86/mul-constant-i16.ll
llvm/trunk/test/CodeGen/X86/mul-constant-i32.ll
llvm/trunk/test/CodeGen/X86/mul-constant-i64.ll
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=337874&r1=337873&r2=337874&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Jul 24 18:15:35 2018
@@ -33920,35 +33920,39 @@ static SDValue combineMul(SDNode *N, Sel
int64_t SignMulAmt = C->getSExtValue();
if ((SignMulAmt != INT64_MIN) && (SignMulAmt != INT64_MAX) &&
(SignMulAmt != -INT64_MAX)) {
- int NumSign = SignMulAmt > 0 ? 1 : -1;
- bool IsPowerOf2_64PlusOne = isPowerOf2_64(NumSign * SignMulAmt - 1);
- bool IsPowerOf2_64MinusOne = isPowerOf2_64(NumSign * SignMulAmt + 1);
- bool IsPowerOf2_64MinusTwo = isPowerOf2_64(NumSign * SignMulAmt + 2);
- if (IsPowerOf2_64PlusOne) {
+ int64_t AbsMulAmt = SignMulAmt < 0 ? -SignMulAmt : SignMulAmt;
+ if (isPowerOf2_64(AbsMulAmt - 1)) {
// (mul x, 2^N + 1) => (add (shl x, N), x)
NewMul = DAG.getNode(
ISD::ADD, DL, VT, N->getOperand(0),
DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0),
- DAG.getConstant(Log2_64(NumSign * SignMulAmt - 1), DL,
+ DAG.getConstant(Log2_64(AbsMulAmt - 1), DL,
MVT::i8)));
// To negate, subtract the number from zero
if (SignMulAmt < 0)
NewMul = DAG.getNode(ISD::SUB, DL, VT,
DAG.getConstant(0, DL, VT), NewMul);
- } else if (IsPowerOf2_64MinusOne) {
+ } else if (isPowerOf2_64(AbsMulAmt + 1)) {
// (mul x, 2^N - 1) => (sub (shl x, N), x)
NewMul = DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0),
- DAG.getConstant(Log2_64(NumSign * SignMulAmt + 1),
+ DAG.getConstant(Log2_64(AbsMulAmt + 1),
DL, MVT::i8));
// To negate, reverse the operands of the subtract.
if (SignMulAmt < 0)
NewMul = DAG.getNode(ISD::SUB, DL, VT, N->getOperand(0), NewMul);
else
NewMul = DAG.getNode(ISD::SUB, DL, VT, NewMul, N->getOperand(0));
- } else if (IsPowerOf2_64MinusTwo && NumSign == 1) {
- // (mul x, 2^N - 1) => (sub (shl x, N), x)
+ } else if (SignMulAmt >= 0 && isPowerOf2_64(AbsMulAmt - 2)) {
+ // (mul x, 2^N + 2) => (add (add (shl x, N), x), x)
+ NewMul = DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0),
+ DAG.getConstant(Log2_64(AbsMulAmt - 2),
+ DL, MVT::i8));
+ NewMul = DAG.getNode(ISD::ADD, DL, VT, NewMul, N->getOperand(0));
+ NewMul = DAG.getNode(ISD::ADD, DL, VT, NewMul, N->getOperand(0));
+ } else if (SignMulAmt >= 0 && isPowerOf2_64(AbsMulAmt + 2)) {
+ // (mul x, 2^N - 2) => (sub (sub (shl x, N), x), x)
NewMul = DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0),
- DAG.getConstant(Log2_64(NumSign * SignMulAmt + 2),
+ DAG.getConstant(Log2_64(AbsMulAmt + 2),
DL, MVT::i8));
NewMul = DAG.getNode(ISD::SUB, DL, VT, NewMul, N->getOperand(0));
NewMul = DAG.getNode(ISD::SUB, DL, VT, NewMul, N->getOperand(0));
Modified: llvm/trunk/test/CodeGen/X86/mul-constant-i16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul-constant-i16.ll?rev=337874&r1=337873&r2=337874&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul-constant-i16.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul-constant-i16.ll Tue Jul 24 18:15:35 2018
@@ -702,6 +702,30 @@ define i16 @test_mul_by_62(i16 %x) {
ret i16 %mul
}
+define i16 @test_mul_by_66(i16 %x) {
+; X86-LABEL: test_mul_by_66:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: shll $6, %eax
+; X86-NEXT: addl %ecx, %eax
+; X86-NEXT: addl %ecx, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test_mul_by_66:
+; X64: # %bb.0:
+; X64-NEXT: # kill: def $edi killed $edi def $rdi
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: shll $6, %eax
+; X64-NEXT: leal (%rax,%rdi), %eax
+; X64-NEXT: addl %edi, %eax
+; X64-NEXT: # kill: def $ax killed $ax killed $eax
+; X64-NEXT: retq
+ %mul = mul nsw i16 %x, 66
+ ret i16 %mul
+}
+
define i16 @test_mul_by_73(i16 %x) {
; X86-LABEL: test_mul_by_73:
; X86: # %bb.0:
Modified: llvm/trunk/test/CodeGen/X86/mul-constant-i32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul-constant-i32.ll?rev=337874&r1=337873&r2=337874&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul-constant-i32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul-constant-i32.ll Tue Jul 24 18:15:35 2018
@@ -1833,6 +1833,66 @@ define i32 @test_mul_by_62(i32 %x) {
ret i32 %mul
}
+define i32 @test_mul_by_66(i32 %x) {
+; X86-LABEL: test_mul_by_66:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: shll $6, %eax
+; X86-NEXT: addl %ecx, %eax
+; X86-NEXT: addl %ecx, %eax
+; X86-NEXT: retl
+;
+; X64-HSW-LABEL: test_mul_by_66:
+; X64-HSW: # %bb.0:
+; X64-HSW-NEXT: # kill: def $edi killed $edi def $rdi
+; X64-HSW-NEXT: movl %edi, %eax # sched: [1:0.25]
+; X64-HSW-NEXT: shll $6, %eax # sched: [1:0.50]
+; X64-HSW-NEXT: leal (%rax,%rdi), %eax # sched: [1:0.50]
+; X64-HSW-NEXT: addl %edi, %eax # sched: [1:0.25]
+; X64-HSW-NEXT: retq # sched: [7:1.00]
+;
+; X64-JAG-LABEL: test_mul_by_66:
+; X64-JAG: # %bb.0:
+; X64-JAG-NEXT: # kill: def $edi killed $edi def $rdi
+; X64-JAG-NEXT: movl %edi, %eax # sched: [1:0.50]
+; X64-JAG-NEXT: shll $6, %eax # sched: [1:0.50]
+; X64-JAG-NEXT: leal (%rax,%rdi), %eax # sched: [1:0.50]
+; X64-JAG-NEXT: addl %edi, %eax # sched: [1:0.50]
+; X64-JAG-NEXT: retq # sched: [4:1.00]
+;
+; X86-NOOPT-LABEL: test_mul_by_66:
+; X86-NOOPT: # %bb.0:
+; X86-NOOPT-NEXT: imull $66, {{[0-9]+}}(%esp), %eax
+; X86-NOOPT-NEXT: retl
+;
+; HSW-NOOPT-LABEL: test_mul_by_66:
+; HSW-NOOPT: # %bb.0:
+; HSW-NOOPT-NEXT: imull $66, %edi, %eax # sched: [3:1.00]
+; HSW-NOOPT-NEXT: retq # sched: [7:1.00]
+;
+; JAG-NOOPT-LABEL: test_mul_by_66:
+; JAG-NOOPT: # %bb.0:
+; JAG-NOOPT-NEXT: imull $66, %edi, %eax # sched: [3:1.00]
+; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
+;
+; X64-SLM-LABEL: test_mul_by_66:
+; X64-SLM: # %bb.0:
+; X64-SLM-NEXT: # kill: def $edi killed $edi def $rdi
+; X64-SLM-NEXT: movl %edi, %eax # sched: [1:0.50]
+; X64-SLM-NEXT: shll $6, %eax # sched: [1:1.00]
+; X64-SLM-NEXT: leal (%rax,%rdi), %eax # sched: [1:1.00]
+; X64-SLM-NEXT: addl %edi, %eax # sched: [1:0.50]
+; X64-SLM-NEXT: retq # sched: [4:1.00]
+;
+; SLM-NOOPT-LABEL: test_mul_by_66:
+; SLM-NOOPT: # %bb.0:
+; SLM-NOOPT-NEXT: imull $66, %edi, %eax # sched: [3:1.00]
+; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
+ %mul = mul nsw i32 %x, 66
+ ret i32 %mul
+}
+
define i32 @test_mul_by_73(i32 %x) {
; X86-LABEL: test_mul_by_73:
; X86: # %bb.0:
Modified: llvm/trunk/test/CodeGen/X86/mul-constant-i64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul-constant-i64.ll?rev=337874&r1=337873&r2=337874&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul-constant-i64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul-constant-i64.ll Tue Jul 24 18:15:35 2018
@@ -1932,6 +1932,69 @@ define i64 @test_mul_by_62(i64 %x) {
ret i64 %mul
}
+define i64 @test_mul_by_66(i64 %x) {
+; X86-LABEL: test_mul_by_66:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, %ecx
+; X86-NEXT: shll $6, %ecx
+; X86-NEXT: addl %eax, %ecx
+; X86-NEXT: addl %eax, %ecx
+; X86-NEXT: movl $66, %eax
+; X86-NEXT: mull {{[0-9]+}}(%esp)
+; X86-NEXT: addl %ecx, %edx
+; X86-NEXT: retl
+;
+; X64-HSW-LABEL: test_mul_by_66:
+; X64-HSW: # %bb.0:
+; X64-HSW-NEXT: movq %rdi, %rax # sched: [1:0.25]
+; X64-HSW-NEXT: shlq $6, %rax # sched: [1:0.50]
+; X64-HSW-NEXT: leaq (%rax,%rdi), %rax # sched: [1:0.50]
+; X64-HSW-NEXT: addq %rdi, %rax # sched: [1:0.25]
+; X64-HSW-NEXT: retq # sched: [7:1.00]
+;
+; X64-JAG-LABEL: test_mul_by_66:
+; X64-JAG: # %bb.0:
+; X64-JAG-NEXT: movq %rdi, %rax # sched: [1:0.50]
+; X64-JAG-NEXT: shlq $6, %rax # sched: [1:0.50]
+; X64-JAG-NEXT: leaq (%rax,%rdi), %rax # sched: [1:0.50]
+; X64-JAG-NEXT: addq %rdi, %rax # sched: [1:0.50]
+; X64-JAG-NEXT: retq # sched: [4:1.00]
+;
+; X86-NOOPT-LABEL: test_mul_by_66:
+; X86-NOOPT: # %bb.0:
+; X86-NOOPT-NEXT: movl $66, %eax
+; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
+; X86-NOOPT-NEXT: imull $66, {{[0-9]+}}(%esp), %ecx
+; X86-NOOPT-NEXT: addl %ecx, %edx
+; X86-NOOPT-NEXT: retl
+;
+; HSW-NOOPT-LABEL: test_mul_by_66:
+; HSW-NOOPT: # %bb.0:
+; HSW-NOOPT-NEXT: imulq $66, %rdi, %rax # sched: [3:1.00]
+; HSW-NOOPT-NEXT: retq # sched: [7:1.00]
+;
+; JAG-NOOPT-LABEL: test_mul_by_66:
+; JAG-NOOPT: # %bb.0:
+; JAG-NOOPT-NEXT: imulq $66, %rdi, %rax # sched: [6:4.00]
+; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
+;
+; X64-SLM-LABEL: test_mul_by_66:
+; X64-SLM: # %bb.0:
+; X64-SLM-NEXT: movq %rdi, %rax # sched: [1:0.50]
+; X64-SLM-NEXT: shlq $6, %rax # sched: [1:1.00]
+; X64-SLM-NEXT: addq %rdi, %rax # sched: [1:0.50]
+; X64-SLM-NEXT: addq %rdi, %rax # sched: [1:0.50]
+; X64-SLM-NEXT: retq # sched: [4:1.00]
+;
+; SLM-NOOPT-LABEL: test_mul_by_66:
+; SLM-NOOPT: # %bb.0:
+; SLM-NOOPT-NEXT: imulq $66, %rdi, %rax # sched: [3:1.00]
+; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
+ %mul = mul nsw i64 %x, 66
+ ret i64 %mul
+}
+
define i64 @test_mul_by_73(i64 %x) {
; X86-LABEL: test_mul_by_73:
; X86: # %bb.0:
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