[PATCH] D49194: [WebAssembly] Add tests for weaker memory consistency orderings

[Heejin Ahn via Phabricator via llvm-commits]

aheejin added a comment.

So far, things we decided:

1. An LLVM fence can be translated to an idempotent atomicrmw operation
2. `asm volatile(""::: "memory")` is currently translated to 0 operation and we will live it at that
3. For volatile, we can make it sequentially consistent atomic operation like MSVC to be user friendy, but some people are concerned if we are providing a too strong guarantee by doing that. We discussed it on a CG meeting <https://docs.google.com/document/d/11YMFhTG1RQdERWe_-jKiN1FceJwh1D9T5sJPpdIBTAc/edit?usp=sharing>, and we will follow up in 2 weeks.

While we can continue discussions here if necessary, I'll land this CL, because this CL does not depend on the volatile thing. Or we can move the discussion to a Github issue or something if you want.


Repository:
  rL LLVM

https://reviews.llvm.org/D49194