[llvm] r337821 - [ARM] Disable ARMCodeGenPrepare by default

[Sam Parker via llvm-commits]

Author: sam_parker
Date: Tue Jul 24 05:04:23 2018
New Revision: 337821

URL: http://llvm.org/viewvc/llvm-project?rev=337821&view=rev
Log:
[ARM] Disable ARMCodeGenPrepare by default

ARM Stage 2 builders have been suspiciously broken since the pass was
committed. Disabling to hopefully fix the bots and give me time to
debug.


Modified:
    llvm/trunk/lib/Target/ARM/ARMCodeGenPrepare.cpp
    llvm/trunk/test/CodeGen/ARM/arm-cgp-icmps.ll
    llvm/trunk/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll
    llvm/trunk/test/CodeGen/ARM/arm-cgp-signed.ll

Modified: llvm/trunk/lib/Target/ARM/ARMCodeGenPrepare.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeGenPrepare.cpp?rev=337821&r1=337820&r2=337821&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMCodeGenPrepare.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMCodeGenPrepare.cpp Tue Jul 24 05:04:23 2018
@@ -42,7 +42,7 @@
 using namespace llvm;
 
 static cl::opt<bool>
-DisableCGP("arm-disable-cgp", cl::Hidden, cl::init(false),
+DisableCGP("arm-disable-cgp", cl::Hidden, cl::init(true),
            cl::desc("Disable ARM specific CodeGenPrepare pass"));
 
 static cl::opt<bool>

Modified: llvm/trunk/test/CodeGen/ARM/arm-cgp-icmps.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-cgp-icmps.ll?rev=337821&r1=337820&r2=337821&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/arm-cgp-icmps.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/arm-cgp-icmps.ll Tue Jul 24 05:04:23 2018
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple=thumbv8.main -mcpu=cortex-m33 %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
-; RUN: llc -mtriple=thumbv7em %s -arm-enable-scalar-dsp=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP
-; RUN: llc -mtriple=thumbv8 %s -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM
+; RUN: llc -mtriple=thumbv8.main -mcpu=cortex-m33 %s -arm-disable-cgp=false -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
+; RUN: llc -mtriple=thumbv7em %s -arm-disable-cgp=false -arm-enable-scalar-dsp=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP
+; RUN: llc -mtriple=thumbv8 %s -arm-disable-cgp=false -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM
 
 ; CHECK-COMMON-LABEL: test_ult_254_inc_imm:
 ; CHECK-DSP:        adds    r0, #1

Modified: llvm/trunk/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll?rev=337821&r1=337820&r2=337821&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll Tue Jul 24 05:04:23 2018
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple=thumbv7m %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
-; RUN: llc -mtriple=thumbv8m.main %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
-; RUN: llc -mtriple=thumbv8m.main -arm-enable-scalar-dsp=true -mcpu=cortex-m33 %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP
-; RUN: llc -mtriple=thumbv7em %s -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM
+; RUN: llc -mtriple=thumbv7m -arm-disable-cgp=false %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
+; RUN: llc -mtriple=thumbv8m.main -arm-disable-cgp=false %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
+; RUN: llc -mtriple=thumbv8m.main -arm-disable-cgp=false -arm-enable-scalar-dsp=true -mcpu=cortex-m33 %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP
+; RUN: llc -mtriple=thumbv7em %s -arm-disable-cgp=false -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM
 
 ; Test that ARMCodeGenPrepare can handle:
 ; - loops

Modified: llvm/trunk/test/CodeGen/ARM/arm-cgp-signed.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-cgp-signed.ll?rev=337821&r1=337820&r2=337821&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/arm-cgp-signed.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/arm-cgp-signed.ll Tue Jul 24 05:04:23 2018
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple=thumbv7m %s -o - | FileCheck %s
-; RUN: llc -mtriple=thumbv8m.main %s -o - | FileCheck %s
-; RUN: llc -mtriple=thumbv7 %s -o - | FileCheck %s
-; RUN: llc -mtriple=armv8 %s -o - | FileCheck %s
+; RUN: llc -mtriple=thumbv7m -arm-disable-cgp=false %s -o - | FileCheck %s
+; RUN: llc -mtriple=thumbv8m.main -arm-disable-cgp=false %s -o - | FileCheck %s
+; RUN: llc -mtriple=thumbv7 %s -arm-disable-cgp=false -o - | FileCheck %s
+; RUN: llc -mtriple=armv8 %s -arm-disable-cgp=false -o - | FileCheck %s
 
 ; Test to check that ARMCodeGenPrepare doesn't optimised away sign extends.
 ; CHECK-LABEL: test_signed_load: