[llvm] r337617 - Revert "[X86][AVX] Convert X86ISD::VBROADCAST demanded elts combine to use SimplifyDemandedVectorElts"
Benjamin Kramer via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 20 13:59:46 PDT 2018
Author: d0k
Date: Fri Jul 20 13:59:46 2018
New Revision: 337617
URL: http://llvm.org/viewvc/llvm-project?rev=337617&view=rev
Log:
Revert "[X86][AVX] Convert X86ISD::VBROADCAST demanded elts combine to use SimplifyDemandedVectorElts"
This reverts commit r337547. It triggers an infinite loop.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/lib/Target/X86/X86ISelLowering.h
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=337617&r1=337616&r2=337617&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Jul 20 13:59:46 2018
@@ -30634,13 +30634,24 @@ static SDValue combineTargetShuffle(SDVa
switch (Opcode) {
case X86ISD::VBROADCAST: {
+ // If broadcasting from another shuffle, attempt to simplify it.
// TODO - we really need a general SimplifyDemandedVectorElts mechanism.
- APInt KnownUndef, KnownZero;
- APInt DemandedMask(APInt::getAllOnesValue(VT.getVectorNumElements()));
- const TargetLowering &TLI = DAG.getTargetLoweringInfo();
- if (TLI.SimplifyDemandedVectorElts(N, DemandedMask, KnownUndef, KnownZero,
- DCI)) {
- return SDValue(N.getNode(), 0);
+ SDValue Src = N.getOperand(0);
+ SDValue BC = peekThroughBitcasts(Src);
+ EVT SrcVT = Src.getValueType();
+ EVT BCVT = BC.getValueType();
+ if (isTargetShuffle(BC.getOpcode()) &&
+ VT.getScalarSizeInBits() % BCVT.getScalarSizeInBits() == 0) {
+ unsigned Scale = VT.getScalarSizeInBits() / BCVT.getScalarSizeInBits();
+ SmallVector<int, 16> DemandedMask(BCVT.getVectorNumElements(),
+ SM_SentinelUndef);
+ for (unsigned i = 0; i != Scale; ++i)
+ DemandedMask[i] = i;
+ if (SDValue Res = combineX86ShufflesRecursively(
+ {BC}, 0, BC, DemandedMask, {}, /*Depth*/ 1,
+ /*HasVarMask*/ false, DAG, Subtarget))
+ return DAG.getNode(X86ISD::VBROADCAST, DL, VT,
+ DAG.getBitcast(SrcVT, Res));
}
return SDValue();
}
@@ -31271,41 +31282,6 @@ static SDValue combineShuffle(SDNode *N,
return SDValue();
}
-bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
- SDValue Op, const APInt &DemandedElts, APInt &KnownUndef, APInt &KnownZero,
- TargetLoweringOpt &TLO, unsigned Depth) const {
-
- if (X86ISD::VBROADCAST != Op.getOpcode())
- return false;
-
- EVT VT = Op.getValueType();
- SDValue Src = Op.getOperand(0);
- SDValue BC = peekThroughBitcasts(Src);
- EVT SrcVT = Src.getValueType();
- EVT BCVT = BC.getValueType();
-
- if (!isTargetShuffle(BC.getOpcode()) ||
- (VT.getScalarSizeInBits() % BCVT.getScalarSizeInBits()) != 0)
- return false;
-
- unsigned Scale = VT.getScalarSizeInBits() / BCVT.getScalarSizeInBits();
- SmallVector<int, 16> DemandedMask(BCVT.getVectorNumElements(),
- SM_SentinelUndef);
- for (unsigned i = 0; i != Scale; ++i)
- DemandedMask[i] = i;
-
- if (SDValue Res = combineX86ShufflesRecursively(
- {BC}, 0, BC, DemandedMask, {}, Depth + 1, /*HasVarMask*/ false,
- TLO.DAG, Subtarget)) {
- SDLoc DL(Op);
- Res = TLO.DAG.getNode(X86ISD::VBROADCAST, DL, VT,
- TLO.DAG.getBitcast(SrcVT, Res));
- return TLO.CombineTo(Op, Res);
- }
-
- return false;
-}
-
/// Check if a vector extract from a target-specific shuffle of a load can be
/// folded into a single element load.
/// Similar handling for VECTOR_SHUFFLE is performed by DAGCombiner, but
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=337617&r1=337616&r2=337617&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Fri Jul 20 13:59:46 2018
@@ -866,13 +866,6 @@ namespace llvm {
const SelectionDAG &DAG,
unsigned Depth) const override;
- bool SimplifyDemandedVectorEltsForTargetNode(SDValue Op,
- const APInt &DemandedElts,
- APInt &KnownUndef,
- APInt &KnownZero,
- TargetLoweringOpt &TLO,
- unsigned Depth) const override;
-
SDValue unwrapAddress(SDValue N) const override;
bool isGAPlusOffset(SDNode *N, const GlobalValue* &GA,
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