[PATCH] D49611: [X86] Improved sched models for X86 SHLD/SHRD* instructions

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: lib/Target/X86/X86SchedBroadwell.td:109
+// SHLD/SHRD
+def : WriteRes<WriteSHDrri, [BWPort1]> {
+  let Latency = 3;
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You should be able to use the X86WriteRes multiclass for all of these (in all models)


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Comment at: lib/Target/X86/X86SchedBroadwell.td:1340
+//def: InstRW<[BWWriteResGroup111], (instregex "SHLD(16|32|64)mri8",
+//                                             "SHRD(16|32|64)mri8")>;
 
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Don't leave commented out entries


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Comment at: lib/Target/X86/X86ScheduleSLM.td:107
+  let NumMicroOps = 2;
+}
+
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Can you fix the test changes?


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Comment at: lib/Target/X86/X86ScheduleZnver1.td:179
+def : WriteRes<WriteSHDmri,    [ZnALU]>; // not used
+def : WriteRes<WriteSHDmrc,    [ZnALU]>; // not used
+
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Why not used like the other models?


https://reviews.llvm.org/D49611