[llvm] r337506 - Skip out of SimplifyDemandedBits for BITCAST of f16 to i16

[Stephen Canon via llvm-commits]

Author: scanon
Date: Thu Jul 19 15:46:42 2018
New Revision: 337506

URL: http://llvm.org/viewvc/llvm-project?rev=337506&view=rev
Log:
Skip out of SimplifyDemandedBits for BITCAST of f16 to i16

Mirrors the existing exit path for f128, avoiding a crash later on.

Differential Revision: https://reviews.llvm.org/D49524


Added:
    llvm/trunk/test/CodeGen/X86/pr38038.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=337506&r1=337505&r2=337506&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Thu Jul 19 15:46:42 2018
@@ -1187,6 +1187,7 @@ bool TargetLowering::SimplifyDemandedBit
       bool OpVTLegal = isOperationLegalOrCustom(ISD::FGETSIGN, VT);
       bool i32Legal  = isOperationLegalOrCustom(ISD::FGETSIGN, MVT::i32);
       if ((OpVTLegal || i32Legal) && VT.isSimple() &&
+           Op.getOperand(0).getValueType() != MVT::f16 &&
            Op.getOperand(0).getValueType() != MVT::f128) {
         // Cannot eliminate/lower SHL for f128 yet.
         EVT Ty = OpVTLegal ? VT : MVT::i32;

Added: llvm/trunk/test/CodeGen/X86/pr38038.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr38038.ll?rev=337506&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr38038.ll (added)
+++ llvm/trunk/test/CodeGen/X86/pr38038.ll Thu Jul 19 15:46:42 2018
@@ -0,0 +1,10 @@
+; RUN: llc < %s
+; PR38038
+
+define i8 @crash(half)  {
+entry:
+  %1 = bitcast half %0 to i16
+  %.lobit = lshr i16 %1, 15
+  %2 = trunc i16 %.lobit to i8
+  ret i8 %2
+}