[PATCH] D49556: [X86][AVX] Use extract_subvector to reduce vector op widths (PR36761)

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 19 10:29:44 PDT 2018


craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.

LGTM other than that comment.



================
Comment at: lib/Target/X86/X86ISelLowering.cpp:39302
+        OpVT.is128BitVector() &&
+        InVec.getOperand(0).getValueType().is128BitVector()) {
+      unsigned ExtOp = InOpcode == X86ISD::VZEXT ? ISD::ZERO_EXTEND_VECTOR_INREG
----------------
getValueType() -> getSimpleValueType()


Repository:
  rL LLVM

https://reviews.llvm.org/D49556





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