[PATCH] D49463: [ARM] Add new feature to enable optimizing the VFD registers
Evandro Menezes via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 18 10:19:28 PDT 2018
evandro added inline comments.
================
Comment at: llvm/lib/Target/ARM/ARM.td:200
+// VFP register widths.
+def FeatureStrictVFPWidth : SubtargetFeature<"strict-vfp-sd",
+ "StrictVFPWidth", "true",
----------------
sbaranga wrote:
> evandro wrote:
> > sbaranga wrote:
> > > I think the description/name is somewhat confusing.
> > >
> > > This enables using vdup instructions to move from the vfp execution domain to neon, which on some cores (at least Cortex-A15) is faster.
> > What do you suggest?
> Something like FeatureUseVDUPForFPToNEON? Ideally something shorter, but that's the best that I can come up with at the moment.
>
> The comment should say something along the lines that it's profitable for the target to use a VDUP instruction when performing a transition from the VFP to NEON execution domain.
How about `FeatureSplatVFPToNeon`?
https://reviews.llvm.org/D49463
More information about the llvm-commits
mailing list