[PATCH] D49469: [mips] Fix predicate for the MipsTruncIntFP pattern

[Simon Atanasyan via Phabricator via llvm-commits]

atanasyan created this revision.
atanasyan added reviewers: smaksimovic, abeserminji, mstojanovic.
Herald added subscribers: jrtc27, arichardson, sdardis.

This is a follow-up to the https://reviews.llvm.org/rL337171. This patch fixes regression introduced by the r337171 and enables MipsTruncIntFP pattern.


Repository:
  rL LLVM

https://reviews.llvm.org/D49469

Files:
  lib/Target/Mips/MipsInstrFPU.td
  test/CodeGen/Mips/double2int.ll


Index: test/CodeGen/Mips/double2int.ll
===================================================================
--- test/CodeGen/Mips/double2int.ll
+++ test/CodeGen/Mips/double2int.ll
@@ -1,4 +1,5 @@
-; RUN: llc -march=mips < %s | FileCheck %s
+; RUN: llc -march=mips -mcpu=mips32 < %s | FileCheck %s
+; RUN: llc -march=mips -mcpu=mips32r6 < %s | FileCheck %s
 
 define i32 @f1(double %d) nounwind readnone {
 entry:
Index: lib/Target/Mips/MipsInstrFPU.td
===================================================================
--- lib/Target/Mips/MipsInstrFPU.td
+++ lib/Target/Mips/MipsInstrFPU.td
@@ -894,7 +894,7 @@
               (PseudoCVT_D64_L GPR64Opnd:$src)>, FGR_64;
 
 def : MipsPat<(MipsTruncIntFP FGR64Opnd:$src),
-              (TRUNC_W_D64 FGR64Opnd:$src)>, ISA_MIPS3, FGR_64;
+              (TRUNC_W_D64 FGR64Opnd:$src)>, ISA_MIPS2, FGR_64;
 def : MipsPat<(MipsTruncIntFP FGR32Opnd:$src),
               (TRUNC_L_S FGR32Opnd:$src)>, ISA_MIPS2, FGR_64;
 def : MipsPat<(MipsTruncIntFP FGR64Opnd:$src),


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