[llvm] r337319 - [X86] Add test case for missed opportunity to use MOVLPS on the SSE1 only targets.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 17 13:16:15 PDT 2018
Author: ctopper
Date: Tue Jul 17 13:16:15 2018
New Revision: 337319
URL: http://llvm.org/viewvc/llvm-project?rev=337319&view=rev
Log:
[X86] Add test case for missed opportunity to use MOVLPS on the SSE1 only targets.
Modified:
llvm/trunk/test/CodeGen/X86/vector-shuffle-sse1.ll
Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-sse1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-sse1.ll?rev=337319&r1=337318&r2=337319&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shuffle-sse1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shuffle-sse1.ll Tue Jul 17 13:16:15 2018
@@ -294,3 +294,15 @@ define <4 x float> @shuffle_mem_v4f32_67
%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 6, i32 7, i32 2, i32 3>
ret <4 x float> %shuffle
}
+
+define <4 x float> @shuffle_mem_v4f32_4523(<4 x float> %a, <4 x float>* %pb) {
+; SSE1-LABEL: shuffle_mem_v4f32_4523:
+; SSE1: # %bb.0:
+; SSE1-NEXT: movaps (%rdi), %xmm1
+; SSE1-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,3]
+; SSE1-NEXT: movaps %xmm1, %xmm0
+; SSE1-NEXT: retq
+ %b = load <4 x float>, <4 x float>* %pb, align 16
+ %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
+ ret <4 x float> %shuffle
+}
More information about the llvm-commits
mailing list