[PATCH] D49342: [LSV] Refactoring + supporting bitcasts to a type of different size

[Roman Tereshin via Phabricator via llvm-commits]

rtereshin added inline comments.


================
Comment at: lib/Transforms/Vectorize/LoadStoreVectorizer.cpp:339
+
+bool Vectorizer::tryHarder(Value *PtrA, Value *PtrB, APInt PtrDelta) {
+  auto *GEPA = dyn_cast<GetElementPtrInst>(PtrA);
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arsenm wrote:
> Needs better name
Any suggestions?


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Comment at: test/Transforms/LoadStoreVectorizer/AMDGPU/gep-bitcast.ll:62
 define void @vect_zext_bitcast_i8_st4_to_i32_idx(i8 addrspace(1)* %arg1, i32 %base) {
-  %add1 = add nuw i32 %base, 0
+  %add1 = add i32 %base, 0
   %zext1 = zext i32 %add1 to i64
----------------
arsenm wrote:
> Why was the new dropped here?
We don't need to know that `add i32 %base, C0` doesn't wrap if we know that `add n[su]w i32 %base, C1` doesn't wrap and `0 <= C0 <= C1`. `Vectorizer::isConsecutiveAccess` is able to notice and exploit this fact in some cases (w/ and w/o this patch). I don't want to regress on it. Perhaps it's better if we also change the offsets in this test from 0, 4, 8, 12 to something non-zero based, like 4, 8, 12, 16.


Repository:
  rL LLVM

https://reviews.llvm.org/D49342