[PATCH] D49378: [x86/SLH] Completely rework how we sink post-load hardening past data invariant instructions to be both more correct and much more powerful.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/trunk/lib/Target/X86/X86SpeculativeLoadHardening.cpp:938
+  case X86::LEA64_32r:
+  case X86::LEA64r:
     return true;
----------------
Off the top of my head
-You probably want NOT and NEG in this list too.
-Pre-BMI2 shift instructions? Especially the shift by immediate since we don't have a BMI equivalent
-Rotate by variable and the pre-BMI2 rotate by immediate?
-SHLD/SHRD?
-Double width result multiplies?
-MOVZX/MOVSX?
-Maybe MOV32rr which is iselled explicitly to clear the upper 32-bits of GR64?


Repository:
  rL LLVM

https://reviews.llvm.org/D49378