[llvm] r337165 - [Sparc] Use the correct encoding for ta 3

Daniel Cederman via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 16 05:28:26 PDT 2018


Author: dcederman
Date: Mon Jul 16 05:28:26 2018
New Revision: 337165

URL: http://llvm.org/viewvc/llvm-project?rev=337165&view=rev
Log:
[Sparc] Use the correct encoding for ta 3

Summary: The old encoding generated a "tn %g1 + 3" instruction instead
of the expected "ta 3".

Reviewers: venkatra, jyknight

Reviewed By: jyknight

Subscribers: fedor.sergeev, jrtc27, llvm-commits

Differential Revision: https://reviews.llvm.org/D49171

Modified:
    llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td
    llvm/trunk/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll

Modified: llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td?rev=337165&r1=337164&r2=337165&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td Mon Jul 16 05:28:26 2018
@@ -421,7 +421,7 @@ let hasSideEffects = 1, mayStore = 1 in
     def FLUSHW : F3_1<0b10, 0b101011, (outs), (ins),
                       "flushw",
                       [(flushw)]>, Requires<[HasV9]>;
-  let rd = 0, rs1 = 1, simm13 = 3 in
+  let rd = 8, rs1 = 0, simm13 = 3 in
     def TA3 : F3_2<0b10, 0b111010, (outs), (ins),
                    "ta 3",
                    [(flushw)]>;

Modified: llvm/trunk/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll?rev=337165&r1=337164&r2=337165&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll (original)
+++ llvm/trunk/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll Mon Jul 16 05:28:26 2018
@@ -1,6 +1,6 @@
-;RUN: llc -march=sparc < %s | FileCheck %s -check-prefix=V8
+;RUN: llc -march=sparc -show-mc-encoding < %s | FileCheck %s -check-prefix=V8
 ;RUN: llc -march=sparc -mattr=v9 < %s | FileCheck %s -check-prefix=V9
-;RUN: llc -march=sparc -regalloc=basic < %s | FileCheck %s -check-prefix=V8
+;RUN: llc -march=sparc -show-mc-encoding -regalloc=basic < %s | FileCheck %s -check-prefix=V8
 ;RUN: llc -march=sparc -regalloc=basic -mattr=v9 < %s | FileCheck %s -check-prefix=V9
 ;RUN: llc -march=sparcv9  < %s | FileCheck %s -check-prefix=SPARC64
 
@@ -31,7 +31,7 @@ entry:
 define i8* @frameaddr2() nounwind readnone {
 entry:
 ;V8-LABEL: frameaddr2:
-;V8: ta 3
+;V8: ta 3 ! encoding: [0x91,0xd0,0x20,0x03]
 ;V8: ld [%fp+56], {{.+}}
 ;V8: ld [{{.+}}+56], {{.+}}
 ;V8: ld [{{.+}}+56], {{.+}}




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