[PATCH] D49336: [x86/SLH] Teach speculative load hardening to correctly harden the indices used by AVX2 and AVX-512 gather instructions.

[Chandler Carruth via Phabricator via llvm-commits]

chandlerc updated this revision to Diff 155557.
chandlerc edited the summary of this revision.
chandlerc added a comment.

Update to use a much better testing strategy, and include tests of all the
AVX512 gather instructions in addition to the AVX2 ones.

This also enhances the rewrite rules to use AVX512VL instructions for rewriting
128-bit and 256-bit gathers when those instructions are available. This should
allow them to have access to the extra registers, etc. It also allows them to
work correctly when the gather itself already is using the AVX512VL register
classes.


Repository:
  rL LLVM

https://reviews.llvm.org/D49336

Files:
  llvm/lib/Target/X86/X86InstrAVX512.td
  llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
  llvm/test/CodeGen/X86/speculative-load-hardening-gather.ll

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