[PATCH] D49280: [X86] Remove isel patterns for MOVSS/MOVSD ISD opcodes with integer types.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

It's 2 patterns repeated 3 times. And as of yesterday these patterns are all qualified with "optsize || !sse41)  and we have new patterns to select blend under (sse41 & !optsize). This fixes a long standing issue where we turned movss/sd into blend later in the pipeline through an accidental double call to commuteInstruction. So with that fixed its now 12 patterns that can be removed. I need to rebase this patch.

I believe we're also missing a pattern to turn (v2f64 (movsd (v2f64), (loadv2f64)) into movlpd(probably really movlps since that's 1 byte shorter and identical in behavior). That would also need to be repeated for v2i64 for SSE, AVX, and AVX512

I think the blend patterns I added last night should also have load versions for consistency unless we want to just depend on the peephole pass.

I think if we were to fix those issues and not take this patch we would have 21 extra patterns. Which I guess is still not a huge number compared to the total number of patterns

I really hope we can find a different way to fix the DAG combiner. Simon is the expert on that code and I'm hoping he has an idea.


Repository:
  rL LLVM

https://reviews.llvm.org/D49280