[PATCH] D38611: Fix X86 regression on linpack

David Greene via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 13 14:31:55 PDT 2018


greened added a comment.

Is the intent here to limit folding stores?  If so, could you update the summary to reflect that?  And probably add a comment to that effect as well.



================
Comment at: lib/Target/X86/X86TargetTransformInfo.cpp:2538
+    // stores with folded address, treating each 2 such stores as 1
+    // additional instruction.
+    unsigned C1Insns = ((C1.FoldedStoreAddresses >> 1) + C1.Insns);
----------------
evstupac wrote:
> RKSimon wrote:
> > This seems incredibly specific to a particular Intel architecture - you said you've tried to make a best average - based on what?
> I have not seen significant difference on Atom CPUs and have seen gains on Cores. It is hard to cover all CPUs. We can adjust this (by limiting to specific CPU(s)) if get a regression.
> 
This is obviously a larger change but it would seem to be useful to tie into the scheduler model and query what can execute on which ports.


Repository:
  rL LLVM

https://reviews.llvm.org/D38611





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