[PATCH] D47999: MIR YAML TracksRegLiveness default to true in yaml parser

[Matthias Braun via Phabricator via llvm-commits]

MatzeB accepted this revision.
MatzeB added a comment.
This revision is now accepted and ready to land.

In https://reviews.llvm.org/D47999#1162130, @MatzeB wrote:

> I still think we should rather try to not set TracksRegLiveness early in the codegen pipeline instead. Let me try how well that works...


After looking around the code some more, I realized again that we also use livein lists to annotate the result of exception handling live-in or (according to some comments at least) flag registers being live accross blocks. From that perspective it is fine to start out a MachineFunction as `TracksRegLiveness==true` and also make this the MIR default.



================
Comment at: test/CodeGen/MIR/X86/force-liveness-track.mir:3-12
+# CHECK: xorl  %eax, %eax
+# CHECK: movl  %eax, (%rcx)
+# CHECK: retq
+name: func0
+body: |
+  bb.0:
+    %0 : gr32 = MOV32r0 implicit-def $eflags
----------------
Just check explicitely for `tracksRegLiveness: True` in the output (unless `-simplify-mir` is used the printer will print everything even if it has default values, so the value should exist in the output).


https://reviews.llvm.org/D47999