[PATCH] D48950: [PowerPC] Improve codegen for vector loads using scalar_to_vector

[Amy Kwan via Phabricator via llvm-commits]

amyk updated this revision to Diff 155471.
amyk added a comment.

This revision addresses:

- Updates to the comments left on the initial patches, such as comment changes, indentation changes.
- Changes to `PPCISelLowering.cpp` to emit load and splat behaviour in test cases.
- Addition of the `XXSLDWIs` instruction, which serves as a single input register form of `XXSLDWI`. This instruction is used in the modification of the `LXSIWZX/LFIWZX` pattern and is needed in order to prevent emitting double the amount of original load instructions.
- Updated patterns for the (`v4i32` and `v4f32` ) `LXSIWZX/LFIWZX` patterns on big endian, using the `XXSLDWIs` instruction (shifting left by 1 word immediate).


https://reviews.llvm.org/D48950

Files:
  llvm/lib/Target/PowerPC/P9InstrResources.td
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCInstrVSX.td
  llvm/test/CodeGen/PowerPC/VSX-XForm-Scalars.ll
  llvm/test/CodeGen/PowerPC/build-vector-tests.ll
  llvm/test/CodeGen/PowerPC/load-v4i8-improved.ll
  llvm/test/CodeGen/PowerPC/power9-moves-and-splats.ll
  llvm/test/CodeGen/PowerPC/qpx-load-splat.ll
  llvm/test/CodeGen/PowerPC/scalar_vector_test_1.ll
  llvm/test/CodeGen/PowerPC/scalar_vector_test_2.ll
  llvm/test/CodeGen/PowerPC/scalar_vector_test_3.ll
  llvm/test/CodeGen/PowerPC/scalar_vector_test_4.ll
  llvm/test/CodeGen/PowerPC/swaps-le-6.ll
  llvm/test/CodeGen/PowerPC/vsx_insert_extract_le.ll

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