[PATCH] D49280: [X86] Remove isel patterns for MOVSS/MOVSD ISD opcodes with integer types.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 12 22:09:03 PDT 2018
craig.topper created this revision.
craig.topper added a reviewer: RKSimon.
Ideally our ISD node types going into the isel table would have types consistent with their instruction domain. This prevents us having to duplicate patterns with different types for the same instruction.
Unfortunately, it seems our shuffle combining is currently relying on this a little remove some bitcasts. This seems to enable some switching between shufps and shufd. Hopefully there's some way we can address this in the combining.
Repository:
rL LLVM
https://reviews.llvm.org/D49280
Files:
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86InstrAVX512.td
lib/Target/X86/X86InstrSSE.td
test/CodeGen/X86/oddshuffles.ll
test/CodeGen/X86/vec_shift7.ll
test/CodeGen/X86/vector-shift-ashr-128.ll
test/CodeGen/X86/vector-shift-lshr-128.ll
test/CodeGen/X86/vector-shuffle-128-v8.ll
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