[PATCH] D49266: [X86][AArch64][DAGCombine] Unfold 'check for [no] signed truncation' pattern

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri created this revision.
lebedev.ri added reviewers: spatel, craig.topper, RKSimon.
Herald added a reviewer: javed.absar.
Herald added a subscriber: kristof.beyls.

I will need to add some more tests, but do we want to check for uses here?
And, i didn't analyze yet whether we want to limit this to some arch?

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PR38149 <https://bugs.llvm.org/show_bug.cgi?id=38149>

As discussed in https://reviews.llvm.org/D49179#1158957 and later,
the IR for 'check for [no] signed truncation' pattern can be improved:
https://rise4fun.com/Alive/gBf
^ that pattern will be produced by Implicit Integer Truncation sanitizer,
https://reviews.llvm.org/D48958 https://bugs.llvm.org/show_bug.cgi?id=21530
in signed case, therefore it is probably a good idea to improve it.

But the IR-optimal patter does not lower efficiently, so we want to undo it..

This handles the simple pattern.
There is a second pattern with predicate and constants inverted.


Repository:
  rL LLVM

https://reviews.llvm.org/D49266

Files:
  include/llvm/CodeGen/TargetLowering.h
  lib/CodeGen/SelectionDAG/TargetLowering.cpp
  test/CodeGen/AArch64/lack-of-signed-truncation-check.ll
  test/CodeGen/AArch64/signed-truncation-check.ll
  test/CodeGen/X86/lack-of-signed-truncation-check.ll
  test/CodeGen/X86/signed-truncation-check.ll

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