[PATCH] D49194: [WebAssembly] Add tests for weaker memory consistency orderings

[JF Bastien via Phabricator via llvm-commits]

jfb added a comment.

In https://reviews.llvm.org/D49194#1159673, @dschuff wrote:

> @jfb just as a sanity check, it should always be valid to just "upgrade" LLVM's orderings and select them all as the sequentially consistent wasm ops, right?


Without going into details, yes. There are reasons one could answer "no", but they're irrelevant.

Do you also upgrade `volatile` to `seq_cst`?

What do you do with fences? In particular, signal fences and release thread fences?

There's code with inline asm for the purpose of compiler fencing (i.e. just a `"memory"` constraint). What do you do for that?


Repository:
  rL LLVM

https://reviews.llvm.org/D49194