[PATCH] D49254: AMDGPU: Scalarize vector argument types to calls

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added a reviewer: rampitec.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, kzhuravl.

When lowering calling conventions, prefer to decompose vectors
into the constitute register types. This avoids artifical constraints
to satisfy a wide super-register.

      

This improves code quality because now optimizations don't need to
deal with the super-register constraint. For example the immediate
folding code doesn't deal with 4 component reg_sequences, so by
breaking the register down earlier the existing immediate folding
code is able to work.

  
  This also avoids the need for the shader input processing code
  to manually split vector types.


https://reviews.llvm.org/D49254

Files:
  lib/Target/AMDGPU/SIISelLowering.cpp
  test/CodeGen/AMDGPU/bfi_int.ll
  test/CodeGen/AMDGPU/call-argument-types.ll
  test/CodeGen/AMDGPU/mad-mix.ll

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