[PATCH] D48411: [RISCV] Add support for _interrupt attribute

[Alex Bradbury via Phabricator via llvm-commits]

asb added inline comments.
Herald added a subscriber: rkruppe.


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Comment at: lib/Target/RISCV/RISCVRegisterInfo.cpp:37-40
+    if (MF->getSubtarget<RISCVSubtarget>().hasStdExtD())
+      return CSR_X32_F64_Interrupt_SaveList;
+    if (MF->getSubtarget<RISCVSubtarget>().hasStdExtF())
+      return CSR_X32_F32_Interrupt_SaveList;
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apazos wrote:
> asb wrote:
> > F and D registers should be saved based on the target ABI rather than the presence of F/D. As support for the hard-float RISC-V ABIs hasn't landed in upstream LLVM yet, leaving save/restore of floating point registers out of this patch might be sensible.
> In that case I think we should at least warn that interrupt attribute in the presence of F and D extensions will not preserve the registers correctly. What do you think?
Thanks for questioning this because this was a 'thinko' on my part and I was incorrect. If F/D are enabled for codegen then we _should_ save and restore F+D, as the function that was interrupted might have been using them, as could a function that we call from the interrupt handler.


https://reviews.llvm.org/D48411