[llvm] r336902 - [InstCombine]add testcases for folding more SPFofSPF pattern
Chen Zheng via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 12 06:28:20 PDT 2018
Author: shchenz
Date: Thu Jul 12 06:28:20 2018
New Revision: 336902
URL: http://llvm.org/viewvc/llvm-project?rev=336902&view=rev
Log:
[InstCombine]add testcases for folding more SPFofSPF pattern
Differential Revision: https://reviews.llvm.org/D49222
Modified:
llvm/trunk/test/Transforms/InstCombine/abs_abs.ll
Modified: llvm/trunk/test/Transforms/InstCombine/abs_abs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/abs_abs.ll?rev=336902&r1=336901&r2=336902&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/abs_abs.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/abs_abs.ll Thu Jul 12 06:28:20 2018
@@ -289,6 +289,87 @@ define i32 @abs_abs_x16(i32 %x) {
ret i32 %cond18
}
+; abs(abs(-x)) -> abs(-x)
+define i32 @abs_abs_x17(i32 %x) {
+; CHECK-LABEL: @abs_abs_x17(
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X]], 0
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND]]
+;
+ %sub = sub nsw i32 0, %x
+ %cmp = icmp sgt i32 %sub, -1
+ %cond = select i1 %cmp, i32 %sub, i32 %x
+ %cmp1 = icmp sgt i32 %cond, -1
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
+ ret i32 %cond18
+}
+
+; abs(abs(x - y)) -> abs(x - y)
+define i32 @abs_abs_x18(i32 %x, i32 %y) {
+; CHECK-LABEL: @abs_abs_x18(
+; CHECK-NEXT: [[A:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[B:%.*]] = sub nsw i32 [[Y]], [[X]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], -1
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[B]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[COND]], 0
+; CHECK-NEXT: [[SUB16:%.*]] = sub nsw i32 0, [[COND]]
+; CHECK-NEXT: [[COND18:%.*]] = select i1 [[CMP1]], i32 [[SUB16]], i32 [[COND]]
+; CHECK-NEXT: ret i32 [[COND18]]
+;
+ %a = sub nsw i32 %x, %y
+ %b = sub nsw i32 %y, %x
+ %cmp = icmp sgt i32 %a, -1
+ %cond = select i1 %cmp, i32 %a, i32 %b
+ %cmp1 = icmp sgt i32 %cond, -1
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
+ ret i32 %cond18
+}
+
+; abs(abs(-x)) -> abs(-x)
+define <2 x i32> @abs_abs_x02_vec(<2 x i32> %x) {
+; CHECK-LABEL: @abs_abs_x02_vec(
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[SUB]], <i32 -1, i32 -1>
+; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer
+; CHECK-NEXT: [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
+; CHECK-NEXT: [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[SUB16]], <2 x i32> [[COND]]
+; CHECK-NEXT: ret <2 x i32> [[COND18]]
+;
+ %sub = sub nsw <2 x i32> zeroinitializer, %x
+ %cmp = icmp sgt <2 x i32> %sub, <i32 -1, i32 -1>
+ %cond = select <2 x i1> %cmp, <2 x i32> %sub, <2 x i32> %x
+ %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
+ %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
+ %cond18 = select <2 x i1> %cmp1, <2 x i32> %cond, <2 x i32> %sub16
+ ret <2 x i32> %cond18
+}
+
+; abs(abs(x - y)) -> abs(x - y)
+define <2 x i32> @abs_abs_x03_vec(<2 x i32> %x, <2 x i32> %y) {
+; CHECK-LABEL: @abs_abs_x03_vec(
+; CHECK-NEXT: [[A:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[B:%.*]] = sub nsw <2 x i32> [[Y:%.*]], [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[A]], <i32 -1, i32 -1>
+; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[A]], <2 x i32> [[B]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer
+; CHECK-NEXT: [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
+; CHECK-NEXT: [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[SUB16]], <2 x i32> [[COND]]
+; CHECK-NEXT: ret <2 x i32> [[COND18]]
+;
+ %a = sub nsw <2 x i32> %x, %y
+ %b = sub nsw <2 x i32> %y, %x
+ %cmp = icmp sgt <2 x i32> %a, <i32 -1, i32 -1>
+ %cond = select <2 x i1> %cmp, <2 x i32> %a, <2 x i32> %b
+ %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
+ %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
+ %cond18 = select <2 x i1> %cmp1, <2 x i32> %cond, <2 x i32> %sub16
+ ret <2 x i32> %cond18
+}
+
define i32 @nabs_nabs_x01(i32 %x) {
; CHECK-LABEL: @nabs_nabs_x01(
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
@@ -545,6 +626,89 @@ define i32 @nabs_nabs_x16(i32 %x) {
ret i32 %cond18
}
+; nabs(nabs(-x)) -> nabs(-x)
+define i32 @nabs_nabs_x17(i32 %x) {
+; CHECK-LABEL: @nabs_nabs_x17(
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X]], 0
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
+; CHECK-NEXT: ret i32 [[COND]]
+;
+ %sub = sub nsw i32 0, %x
+ %cmp = icmp sgt i32 %sub, -1
+ %cond = select i1 %cmp, i32 %x, i32 %sub
+ %cmp1 = icmp sgt i32 %cond, -1
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %sub16, i32 %cond
+ ret i32 %cond18
+}
+
+; nabs(nabs(x - y)) -> nabs(x - y)
+define i32 @nabs_nabs_x18(i32 %x, i32 %y) {
+; CHECK-LABEL: @nabs_nabs_x18(
+; CHECK-NEXT: [[A:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[B:%.*]] = sub nsw i32 [[Y]], [[X]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], -1
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[B]], i32 [[A]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[COND]], 0
+; CHECK-NEXT: [[SUB16:%.*]] = sub nsw i32 0, [[COND]]
+; CHECK-NEXT: [[COND18:%.*]] = select i1 [[CMP1]], i32 [[COND]], i32 [[SUB16]]
+; CHECK-NEXT: ret i32 [[COND18]]
+;
+ %a = sub nsw i32 %x, %y
+ %b = sub nsw i32 %y, %x
+ %cmp = icmp sgt i32 %a, -1
+ %cond = select i1 %cmp, i32 %b, i32 %a
+ %cmp1 = icmp sgt i32 %cond, -1
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %sub16, i32 %cond
+ ret i32 %cond18
+}
+
+; nabs(nabs(-x)) -> nabs(-x)
+define <2 x i32> @nabs_nabs_x01_vec(<2 x i32> %x) {
+; CHECK-LABEL: @nabs_nabs_x01_vec(
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[SUB]], <i32 -1, i32 -1>
+; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[X]], <2 x i32> [[SUB]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer
+; CHECK-NEXT: [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
+; CHECK-NEXT: [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[COND]], <2 x i32> [[SUB16]]
+; CHECK-NEXT: ret <2 x i32> [[COND18]]
+;
+
+;
+ %sub = sub nsw <2 x i32> zeroinitializer, %x
+ %cmp = icmp sgt <2 x i32> %sub, <i32 -1, i32 -1>
+ %cond = select <2 x i1> %cmp, <2 x i32> %x, <2 x i32> %sub
+ %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
+ %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
+ %cond18 = select <2 x i1> %cmp1, <2 x i32> %sub16, <2 x i32> %cond
+ ret <2 x i32> %cond18
+}
+
+; nabs(nabs(x - y)) -> nabs(x - y)
+define <2 x i32> @nabs_nabs_x02_vec(<2 x i32> %x, <2 x i32> %y) {
+; CHECK-LABEL: @nabs_nabs_x02_vec(
+; CHECK-NEXT: [[A:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[B:%.*]] = sub nsw <2 x i32> [[Y:%.*]], [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[A]], <i32 -1, i32 -1>
+; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[B]], <2 x i32> [[A]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer
+; CHECK-NEXT: [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
+; CHECK-NEXT: [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[COND]], <2 x i32> [[SUB16]]
+; CHECK-NEXT: ret <2 x i32> [[COND18]]
+;
+ %a = sub nsw <2 x i32> %x, %y
+ %b = sub nsw <2 x i32> %y, %x
+ %cmp = icmp sgt <2 x i32> %a, <i32 -1, i32 -1>
+ %cond = select <2 x i1> %cmp, <2 x i32> %b, <2 x i32> %a
+ %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
+ %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
+ %cond18 = select <2 x i1> %cmp1, <2 x i32> %sub16, <2 x i32> %cond
+ ret <2 x i32> %cond18
+}
+
define i32 @abs_nabs_x01(i32 %x) {
; CHECK-LABEL: @abs_nabs_x01(
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
@@ -801,6 +965,87 @@ define i32 @abs_nabs_x16(i32 %x) {
ret i32 %cond18
}
+; abs(nabs(-x)) -> abs(-x)
+define i32 @abs_nabs_x17(i32 %x) {
+; CHECK-LABEL: @abs_nabs_x17(
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X]], 0
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND1]]
+;
+ %sub = sub nsw i32 0, %x
+ %cmp = icmp sgt i32 %sub, -1
+ %cond = select i1 %cmp, i32 %x, i32 %sub
+ %cmp1 = icmp sgt i32 %cond, -1
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
+ ret i32 %cond18
+}
+
+; abs(nabs(x - y)) -> abs(x - y)
+define i32 @abs_nabs_x18(i32 %x, i32 %y) {
+; CHECK-LABEL: @abs_nabs_x18(
+; CHECK-NEXT: [[A:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[B:%.*]] = sub nsw i32 [[Y]], [[X]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], -1
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[B]], i32 [[A]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[COND]], 0
+; CHECK-NEXT: [[SUB16:%.*]] = sub nsw i32 0, [[COND]]
+; CHECK-NEXT: [[COND18:%.*]] = select i1 [[CMP1]], i32 [[SUB16]], i32 [[COND]]
+; CHECK-NEXT: ret i32 [[COND18]]
+;
+ %a = sub nsw i32 %x, %y
+ %b = sub nsw i32 %y, %x
+ %cmp = icmp sgt i32 %a, -1
+ %cond = select i1 %cmp, i32 %b, i32 %a
+ %cmp1 = icmp sgt i32 %cond, -1
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
+ ret i32 %cond18
+}
+
+; abs(nabs(-x)) -> abs(-x)
+define <2 x i32> @abs_nabs_x01_vec(<2 x i32> %x) {
+; CHECK-LABEL: @abs_nabs_x01_vec(
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[SUB]], <i32 -1, i32 -1>
+; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[X]], <2 x i32> [[SUB]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer
+; CHECK-NEXT: [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
+; CHECK-NEXT: [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[SUB16]], <2 x i32> [[COND]]
+; CHECK-NEXT: ret <2 x i32> [[COND18]]
+;
+ %sub = sub nsw <2 x i32> zeroinitializer, %x
+ %cmp = icmp sgt <2 x i32> %sub, <i32 -1, i32 -1>
+ %cond = select <2 x i1> %cmp, <2 x i32> %x, <2 x i32> %sub
+ %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
+ %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
+ %cond18 = select <2 x i1> %cmp1, <2 x i32> %cond, <2 x i32> %sub16
+ ret <2 x i32> %cond18
+}
+
+; abs(nabs(x - y)) -> abs(x - y)
+define <2 x i32> @abs_nabs_x02_vec(<2 x i32> %x, <2 x i32> %y) {
+; CHECK-LABEL: @abs_nabs_x02_vec(
+; CHECK-NEXT: [[A:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[B:%.*]] = sub nsw <2 x i32> [[Y:%.*]], [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[A]], <i32 -1, i32 -1>
+; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[B]], <2 x i32> [[A]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer
+; CHECK-NEXT: [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
+; CHECK-NEXT: [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[SUB16]], <2 x i32> [[COND]]
+; CHECK-NEXT: ret <2 x i32> [[COND18]]
+;
+ %a = sub nsw <2 x i32> %x, %y
+ %b = sub nsw <2 x i32> %y, %x
+ %cmp = icmp sgt <2 x i32> %a, <i32 -1, i32 -1>
+ %cond = select <2 x i1> %cmp, <2 x i32> %b, <2 x i32> %a
+ %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
+ %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
+ %cond18 = select <2 x i1> %cmp1, <2 x i32> %cond, <2 x i32> %sub16
+ ret <2 x i32> %cond18
+}
+
define i32 @nabs_abs_x01(i32 %x) {
; CHECK-LABEL: @nabs_abs_x01(
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
@@ -1057,3 +1302,84 @@ define i32 @nabs_abs_x16(i32 %x) {
ret i32 %cond18
}
+; nabs(abs(-x)) -> nabs(-x)
+define i32 @nabs_abs_x17(i32 %x) {
+; CHECK-LABEL: @nabs_abs_x17(
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X]], 0
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
+; CHECK-NEXT: ret i32 [[COND1]]
+;
+ %sub = sub nsw i32 0, %x
+ %cmp = icmp sgt i32 %sub, -1
+ %cond = select i1 %cmp, i32 %sub, i32 %x
+ %cmp1 = icmp sgt i32 %cond, -1
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %sub16, i32 %cond
+ ret i32 %cond18
+}
+
+; nabs(abs(x - y)) -> nabs(x - y)
+define i32 @nabs_abs_x18(i32 %x, i32 %y) {
+; CHECK-LABEL: @nabs_abs_x18(
+; CHECK-NEXT: [[A:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[B:%.*]] = sub nsw i32 [[Y]], [[X]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], -1
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[B]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[COND]], 0
+; CHECK-NEXT: [[SUB16:%.*]] = sub nsw i32 0, [[COND]]
+; CHECK-NEXT: [[COND18:%.*]] = select i1 [[CMP1]], i32 [[COND]], i32 [[SUB16]]
+; CHECK-NEXT: ret i32 [[COND18]]
+;
+ %a = sub nsw i32 %x, %y
+ %b = sub nsw i32 %y, %x
+ %cmp = icmp sgt i32 %a, -1
+ %cond = select i1 %cmp, i32 %a, i32 %b
+ %cmp1 = icmp sgt i32 %cond, -1
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %sub16, i32 %cond
+ ret i32 %cond18
+}
+
+; nabs(abs(-x)) -> nabs(-x)
+define <2 x i32> @nabs_abs_x01_vec(<2 x i32> %x) {
+; CHECK-LABEL: @nabs_abs_x01_vec(
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[SUB]], <i32 -1, i32 -1>
+; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer
+; CHECK-NEXT: [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
+; CHECK-NEXT: [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[COND]], <2 x i32> [[SUB16]]
+; CHECK-NEXT: ret <2 x i32> [[COND18]]
+;
+;
+ %sub = sub nsw <2 x i32> zeroinitializer, %x
+ %cmp = icmp sgt <2 x i32> %sub, <i32 -1, i32 -1>
+ %cond = select <2 x i1> %cmp, <2 x i32> %sub, <2 x i32> %x
+ %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
+ %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
+ %cond18 = select <2 x i1> %cmp1, <2 x i32> %sub16, <2 x i32> %cond
+ ret <2 x i32> %cond18
+}
+
+; nabs(abs(x - y)) -> nabs(x - y)
+define <2 x i32> @nabs_abs_x02_vec(<2 x i32> %x, <2 x i32> %y) {
+; CHECK-LABEL: @nabs_abs_x02_vec(
+; CHECK-NEXT: [[A:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[B:%.*]] = sub nsw <2 x i32> [[Y:%.*]], [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[A]], <i32 -1, i32 -1>
+; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[A]], <2 x i32> [[B]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer
+; CHECK-NEXT: [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
+; CHECK-NEXT: [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[COND]], <2 x i32> [[SUB16]]
+; CHECK-NEXT: ret <2 x i32> [[COND18]]
+;
+ %a = sub nsw <2 x i32> %x, %y
+ %b = sub nsw <2 x i32> %y, %x
+ %cmp = icmp sgt <2 x i32> %a, <i32 -1, i32 -1>
+ %cond = select <2 x i1> %cmp, <2 x i32> %a, <2 x i32> %b
+ %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
+ %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
+ %cond18 = select <2 x i1> %cmp1, <2 x i32> %sub16, <2 x i32> %cond
+ ret <2 x i32> %cond18
+}
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