[llvm] r336789 - [AArch64][SVE] Asm: Support for COMPACT instruction.
Sander de Smalen via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 11 04:22:26 PDT 2018
Author: s.desmalen
Date: Wed Jul 11 04:22:26 2018
New Revision: 336789
URL: http://llvm.org/viewvc/llvm-project?rev=336789&view=rev
Log:
[AArch64][SVE] Asm: Support for COMPACT instruction.
The compact instruction shuffles active elements of vector
into lowest numbered elements and sets remaining elements
to zero.
e.g.
compact z0.s, p0, z1.s
Added:
llvm/trunk/test/MC/AArch64/SVE/compact-diagnostics.s
llvm/trunk/test/MC/AArch64/SVE/compact.s
Modified:
llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td
Modified: llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td?rev=336789&r1=336788&r2=336789&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64SVEInstrInfo.td Wed Jul 11 04:22:26 2018
@@ -112,6 +112,8 @@ let Predicates = [HasSVE] in {
// Select elements from either vector (predicated)
defm SEL_ZPZZ : sve_int_sel_vvv<"sel">;
+ defm COMPACT_ZPZ : sve_int_perm_compact<"compact">;
+
def AND_PPzPP : sve_int_pred_log<0b0000, "and">;
def BIC_PPzPP : sve_int_pred_log<0b0001, "bic">;
def EOR_PPzPP : sve_int_pred_log<0b0010, "eor">;
Modified: llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td?rev=336789&r1=336788&r2=336789&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td (original)
+++ llvm/trunk/lib/Target/AArch64/SVEInstrFormats.td Wed Jul 11 04:22:26 2018
@@ -2574,6 +2574,28 @@ multiclass sve_int_perm_cpy_v<string asm
(!cast<Instruction>(NAME # _D) ZPR64:$Zd, PPR3bAny:$Pg, FPR64:$Vn), 1>;
}
+class sve_int_perm_compact<bit sz, string asm, ZPRRegOp zprty>
+: I<(outs zprty:$Zd), (ins PPR3bAny:$Pg, zprty:$Zn),
+ asm, "\t$Zd, $Pg, $Zn",
+ "",
+ []>, Sched<[]> {
+ bits<3> Pg;
+ bits<5> Zd;
+ bits<5> Zn;
+ let Inst{31-23} = 0b000001011;
+ let Inst{22} = sz;
+ let Inst{21-13} = 0b100001100;
+ let Inst{12-10} = Pg;
+ let Inst{9-5} = Zn;
+ let Inst{4-0} = Zd;
+}
+
+multiclass sve_int_perm_compact<string asm> {
+ def _S : sve_int_perm_compact<0b0, asm, ZPR32>;
+ def _D : sve_int_perm_compact<0b1, asm, ZPR64>;
+}
+
+
//===----------------------------------------------------------------------===//
// SVE Memory - Contiguous Load Group
//===----------------------------------------------------------------------===//
Added: llvm/trunk/test/MC/AArch64/SVE/compact-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/compact-diagnostics.s?rev=336789&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/compact-diagnostics.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/compact-diagnostics.s Wed Jul 11 04:22:26 2018
@@ -0,0 +1,28 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
+
+// --------------------------------------------------------------------------//
+// Invalid predicate
+
+compact z23.d, p8, z13.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: compact z23.d, p8, z13.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// --------------------------------------------------------------------------//
+// Invalid element widths
+
+compact z31.s, p7, z31.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: compact z31.s, p7, z31.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+compact z31.b, p7, z31.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: compact z31.b, p7, z31.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+compact z31.h, p7, z31.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: compact z31.h, p7, z31.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Added: llvm/trunk/test/MC/AArch64/SVE/compact.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/SVE/compact.s?rev=336789&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/SVE/compact.s (added)
+++ llvm/trunk/test/MC/AArch64/SVE/compact.s Wed Jul 11 04:22:26 2018
@@ -0,0 +1,20 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+compact z31.s, p7, z31.s
+// CHECK-INST: compact z31.s, p7, z31.s
+// CHECK-ENCODING: [0xff,0x9f,0xa1,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 9f a1 05 <unknown>
+
+compact z31.d, p7, z31.d
+// CHECK-INST: compact z31.d, p7, z31.d
+// CHECK-ENCODING: [0xff,0x9f,0xe1,0x05]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 9f e1 05 <unknown>
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