[PATCH] D49125: [ARM] ParallelDSP: multiple reduction stmts in loop
Sjoerd Meijer via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 10 08:19:24 PDT 2018
SjoerdMeijer updated this revision to Diff 154809.
SjoerdMeijer added a comment.
Thanks for the suggestion.
This update makes explicit that the different MAC chains don't interfere/alias with each other. I.e. MAC-chains are a simple chains that starts with a reducing integer add statement, and then a chain of adds and muls, which only has sext and loads as operands. Thus, we don't write memory, and we set a ReadOnly flag.
https://reviews.llvm.org/D49125
Files:
lib/Target/ARM/ARMParallelDSP.cpp
test/CodeGen/ARM/smlad0.ll
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