[llvm] r336645 - [X86] Fast-isel tests for lowered truncation intrinsics
Mikhail Dvoretckii via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 10 01:26:54 PDT 2018
Author: mike.dvoretsky
Date: Tue Jul 10 01:26:54 2018
New Revision: 336645
URL: http://llvm.org/viewvc/llvm-project?rev=336645&view=rev
Log:
[X86] Fast-isel tests for lowered truncation intrinsics
This patch adds fast-isel tests for the IR patterns produced for truncation
intrinsics in rC336643.
Differential Revision: https://reviews.llvm.org/D48822
Modified:
llvm/trunk/test/CodeGen/X86/avx512bwvl-intrinsics-fast-isel.ll
llvm/trunk/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll
Modified: llvm/trunk/test/CodeGen/X86/avx512bwvl-intrinsics-fast-isel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512bwvl-intrinsics-fast-isel.ll?rev=336645&r1=336644&r2=336645&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512bwvl-intrinsics-fast-isel.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512bwvl-intrinsics-fast-isel.ll Tue Jul 10 01:26:54 2018
@@ -733,6 +733,19 @@ define <4 x i64> @test_mm256_maskz_broad
ret <4 x i64> %res2
}
+define <2 x i64> @test_mm_cvtepi16_epi8(<2 x i64> %__A) {
+; CHECK-LABEL: test_mm_cvtepi16_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14],zero,zero,zero,zero,zero,zero,zero,zero
+; CHECK-NEXT: ret{{[l|q]}}
+entry:
+ %0 = bitcast <2 x i64> %__A to <8 x i16>
+ %conv.i = trunc <8 x i16> %0 to <8 x i8>
+ %shuf.i = shufflevector <8 x i8> %conv.i, <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+ %1 = bitcast <16 x i8> %shuf.i to <2 x i64>
+ ret <2 x i64> %1
+}
+
define <2 x i64> @test_mm256_cvtepi16_epi8(<4 x i64> %__A) {
; CHECK-LABEL: test_mm256_cvtepi16_epi8:
; CHECK: # %bb.0: # %entry
Modified: llvm/trunk/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll?rev=336645&r1=336644&r2=336645&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll Tue Jul 10 01:26:54 2018
@@ -3141,6 +3141,68 @@ entry:
ret <2 x i64> %tmp4
}
+define <2 x i64> @test_mm_cvtepi32_epi8(<2 x i64> %__A) {
+; CHECK-LABEL: test_mm_cvtepi32_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,4,8,12],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
+; CHECK-NEXT: ret{{[l|q]}}
+entry:
+ %0 = bitcast <2 x i64> %__A to <4 x i32>
+ %conv.i = trunc <4 x i32> %0 to <4 x i8>
+ %shuf.i = shufflevector <4 x i8> %conv.i, <4 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7>
+ %1 = bitcast <16 x i8> %shuf.i to <2 x i64>
+ ret <2 x i64> %1
+}
+
+define <2 x i64> @test_mm_cvtepi32_epi16(<2 x i64> %__A) {
+; CHECK-LABEL: test_mm_cvtepi32_epi16:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero
+; CHECK-NEXT: ret{{[l|q]}}
+entry:
+ %0 = bitcast <2 x i64> %__A to <4 x i32>
+ %conv.i = trunc <4 x i32> %0 to <4 x i16>
+ %shuf.i = shufflevector <4 x i16> %conv.i, <4 x i16> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+ %1 = bitcast <8 x i16> %shuf.i to <2 x i64>
+ ret <2 x i64> %1
+}
+
+define <2 x i64> @test_mm_cvtepi64_epi8(<2 x i64> %__A) {
+; CHECK-LABEL: test_mm_cvtepi64_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,8],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
+; CHECK-NEXT: ret{{[l|q]}}
+entry:
+ %conv.i = trunc <2 x i64> %__A to <2 x i8>
+ %shuf.i = shufflevector <2 x i8> %conv.i, <2 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3>
+ %0 = bitcast <16 x i8> %shuf.i to <2 x i64>
+ ret <2 x i64> %0
+}
+
+define <2 x i64> @test_mm_cvtepi64_epi16(<2 x i64> %__A) {
+; CHECK-LABEL: test_mm_cvtepi64_epi16:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,8,9],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
+; CHECK-NEXT: ret{{[l|q]}}
+entry:
+ %conv.i = trunc <2 x i64> %__A to <2 x i16>
+ %shuf.i = shufflevector <2 x i16> %conv.i, <2 x i16> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3>
+ %0 = bitcast <8 x i16> %shuf.i to <2 x i64>
+ ret <2 x i64> %0
+}
+
+define <2 x i64> @test_mm_cvtepi64_epi32(<2 x i64> %__A) {
+; CHECK-LABEL: test_mm_cvtepi64_epi32:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,2],zero,zero
+; CHECK-NEXT: ret{{[l|q]}}
+entry:
+ %conv.i = trunc <2 x i64> %__A to <2 x i32>
+ %shuf.i = shufflevector <2 x i32> %conv.i, <2 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
+ %0 = bitcast <4 x i32> %shuf.i to <2 x i64>
+ ret <2 x i64> %0
+}
+
define <2 x i64> @test_mm256_cvtepi32_epi16(<4 x i64> %__A) local_unnamed_addr #0 {
; CHECK-LABEL: test_mm256_cvtepi32_epi16:
; CHECK: # %bb.0: # %entry
@@ -3260,6 +3322,46 @@ entry:
ret <2 x i64> %2
}
+define <2 x i64> @test_mm256_cvtepi64_epi8(<4 x i64> %__A) {
+; CHECK-LABEL: test_mm256_cvtepi64_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vpmovqb %ymm0, %xmm0
+; CHECK-NEXT: vzeroupper
+; CHECK-NEXT: ret{{[l|q]}}
+entry:
+ %conv.i = trunc <4 x i64> %__A to <4 x i8>
+ %shuf.i = shufflevector <4 x i8> %conv.i, <4 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7>
+ %0 = bitcast <16 x i8> %shuf.i to <2 x i64>
+ ret <2 x i64> %0
+}
+
+define <2 x i64> @test_mm256_cvtepi64_epi16(<4 x i64> %__A) {
+; CHECK-LABEL: test_mm256_cvtepi64_epi16:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vpmovqw %ymm0, %xmm0
+; CHECK-NEXT: vzeroupper
+; CHECK-NEXT: ret{{[l|q]}}
+entry:
+ %conv.i = trunc <4 x i64> %__A to <4 x i16>
+ %shuf.i = shufflevector <4 x i16> %conv.i, <4 x i16> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+ %0 = bitcast <8 x i16> %shuf.i to <2 x i64>
+ ret <2 x i64> %0
+}
+
+define <2 x i64> @test_mm256_cvtepi32_epi8(<4 x i64> %__A) {
+; CHECK-LABEL: test_mm256_cvtepi32_epi8:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vpmovdb %ymm0, %xmm0
+; CHECK-NEXT: vzeroupper
+; CHECK-NEXT: ret{{[l|q]}}
+entry:
+ %0 = bitcast <4 x i64> %__A to <8 x i32>
+ %conv.i = trunc <8 x i32> %0 to <8 x i8>
+ %shuf.i = shufflevector <8 x i8> %conv.i, <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+ %1 = bitcast <16 x i8> %shuf.i to <2 x i64>
+ ret <2 x i64> %1
+}
+
define <2 x i64> @test_mm_ternarylogic_epi32(<2 x i64> %__A, <2 x i64> %__B, <2 x i64> %__C) {
; CHECK-LABEL: test_mm_ternarylogic_epi32:
; CHECK: # %bb.0: # %entry
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