[llvm] r336595 - [Power9] [LLVM] Add __float128 support for trunc to double round to odd

[Stefan Pintilie via llvm-commits]

Author: stefanp
Date: Mon Jul  9 13:09:22 2018
New Revision: 336595

URL: http://llvm.org/viewvc/llvm-project?rev=336595&view=rev
Log:
[Power9] [LLVM] Add __float128 support for trunc to double round to odd

Add support for this builtin:
double builtin_truncf128_round_to_odd(float128)

Differential Revision: https://reviews.llvm.org/D48483

Modified:
    llvm/trunk/include/llvm/IR/IntrinsicsPowerPC.td
    llvm/trunk/lib/Target/PowerPC/PPCInstrVSX.td
    llvm/trunk/test/CodeGen/PowerPC/builtins-ppc-p9-f128.ll

Modified: llvm/trunk/include/llvm/IR/IntrinsicsPowerPC.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IR/IntrinsicsPowerPC.td?rev=336595&r1=336594&r2=336595&view=diff
==============================================================================
--- llvm/trunk/include/llvm/IR/IntrinsicsPowerPC.td (original)
+++ llvm/trunk/include/llvm/IR/IntrinsicsPowerPC.td Mon Jul  9 13:09:22 2018
@@ -62,6 +62,9 @@ let TargetPrefix = "ppc" in {  // All in
                        Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty],
                                  [IntrNoMem]>;
 
+  def int_ppc_truncf128_round_to_odd
+      : GCCBuiltin<"__builtin_truncf128_round_to_odd">,
+        Intrinsic <[llvm_double_ty], [llvm_f128_ty], [IntrNoMem]>;
   def int_ppc_sqrtf128_round_to_odd
       : GCCBuiltin<"__builtin_sqrtf128_round_to_odd">,
         Intrinsic <[llvm_f128_ty], [llvm_f128_ty], [IntrNoMem]>;

Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrVSX.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrVSX.td?rev=336595&r1=336594&r2=336595&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrVSX.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrVSX.td Mon Jul  9 13:09:22 2018
@@ -2555,7 +2555,10 @@ let AddedComplexity = 400, Predicates =
 
   // Round & Convert QP -> DP (dword[1] is set to zero)
   def XSCVQPDP  : X_VT5_XO5_VB5_VSFR<63, 20, 836, "xscvqpdp" , []>;
-  def XSCVQPDPO : X_VT5_XO5_VB5_VSFR_Ro<63, 20, 836, "xscvqpdpo", []>;
+  def XSCVQPDPO : X_VT5_XO5_VB5_VSFR_Ro<63, 20, 836, "xscvqpdpo",
+                                        [(set f64:$vT,
+                                        (int_ppc_truncf128_round_to_odd
+                                        f128:$vB))]>;
 
   // Truncate & Convert QP -> (Un)Signed (D)Word (dword[1] is set to zero)
   def XSCVQPSDZ : X_VT5_XO5_VB5<63, 25, 836, "xscvqpsdz", []>;

Modified: llvm/trunk/test/CodeGen/PowerPC/builtins-ppc-p9-f128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/builtins-ppc-p9-f128.ll?rev=336595&r1=336594&r2=336595&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/builtins-ppc-p9-f128.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/builtins-ppc-p9-f128.ll Mon Jul  9 13:09:22 2018
@@ -80,3 +80,13 @@ entry:
 
 declare fp128 @llvm.ppc.divf128.round.to.odd(fp128, fp128)
 
+define double @testTruncOdd() {
+entry:
+  %0 = load fp128, fp128* @A, align 16
+  %1 = call double @llvm.ppc.truncf128.round.to.odd(fp128 %0)
+  ret double %1
+  ; CHECK-LABEL: testTruncOdd
+  ; CHECK: xscvqpdpo
+}
+
+declare double @llvm.ppc.truncf128.round.to.odd(fp128)