[llvm] r336525 - [AccelTable] Dwarf5AccelTableEmitter -> Writer (NFC)

Jonas Devlieghere via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 9 01:47:39 PDT 2018


Author: jdevlieghere
Date: Mon Jul  9 01:47:38 2018
New Revision: 336525

URL: http://llvm.org/viewvc/llvm-project?rev=336525&view=rev
Log:
[AccelTable] Dwarf5AccelTableEmitter -> Writer (NFC)

Renames Dwarf5AccelTableEmitter to Dwarf5AccelTableWriter as suggested
in D49031.

Modified:
    llvm/trunk/lib/CodeGen/AsmPrinter/AccelTable.cpp

Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AccelTable.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AccelTable.cpp?rev=336525&r1=336524&r2=336525&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/AccelTable.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/AccelTable.cpp Mon Jul  9 01:47:38 2018
@@ -89,7 +89,7 @@ void AccelTableBase::finalize(AsmPrinter
 namespace {
 /// Base class for writing out Accelerator tables. It holds the common
 /// functionality for the two Accelerator table types.
-class AccelTableEmitter {
+class AccelTableWriter {
 protected:
   AsmPrinter *const Asm;          ///< Destination.
   const AccelTableBase &Contents; ///< Data to emit.
@@ -106,13 +106,13 @@ protected:
   void emitOffsets(const MCSymbol *Base) const;
 
 public:
-  AccelTableEmitter(AsmPrinter *Asm, const AccelTableBase &Contents,
-                    bool SkipIdenticalHashes)
+  AccelTableWriter(AsmPrinter *Asm, const AccelTableBase &Contents,
+                   bool SkipIdenticalHashes)
       : Asm(Asm), Contents(Contents), SkipIdenticalHashes(SkipIdenticalHashes) {
   }
 };
 
-class AppleAccelTableEmitter : public AccelTableEmitter {
+class AppleAccelTableWriter : public AccelTableWriter {
   using Atom = AppleAccelTableData::Atom;
 
   /// The fixed header of an Apple Accelerator Table.
@@ -165,9 +165,9 @@ class AppleAccelTableEmitter : public Ac
   void emitData() const;
 
 public:
-  AppleAccelTableEmitter(AsmPrinter *Asm, const AccelTableBase &Contents,
-                         ArrayRef<Atom> Atoms, const MCSymbol *SecBegin)
-      : AccelTableEmitter(Asm, Contents, true),
+  AppleAccelTableWriter(AsmPrinter *Asm, const AccelTableBase &Contents,
+                        ArrayRef<Atom> Atoms, const MCSymbol *SecBegin)
+      : AccelTableWriter(Asm, Contents, true),
         Header(Contents.getBucketCount(), Contents.getUniqueHashCount(),
                8 + (Atoms.size() * 4)),
         HeaderData(Atoms), SecBegin(SecBegin) {}
@@ -182,7 +182,7 @@ public:
 
 /// Class responsible for emitting a DWARF v5 Accelerator Table. The only public
 /// function is emit(), which performs the actual emission.
-class Dwarf5AccelTableEmitter : public AccelTableEmitter {
+class Dwarf5AccelTableWriter : public AccelTableWriter {
   struct Header {
     uint32_t UnitLength = 0;
     uint16_t Version = 5;
@@ -200,7 +200,7 @@ class Dwarf5AccelTableEmitter : public A
         : CompUnitCount(CompUnitCount), BucketCount(BucketCount),
           NameCount(NameCount) {}
 
-    void emit(const Dwarf5AccelTableEmitter &Ctx) const;
+    void emit(const Dwarf5AccelTableWriter &Ctx) const;
   };
   struct AttributeEncoding {
     dwarf::Index Index;
@@ -230,15 +230,15 @@ class Dwarf5AccelTableEmitter : public A
   void emitData() const;
 
 public:
-  Dwarf5AccelTableEmitter(
-      AsmPrinter *Asm, const AccelTableBase &Contents, const DwarfDebug &DD,
-      ArrayRef<std::unique_ptr<DwarfCompileUnit>> CompUnits);
+  Dwarf5AccelTableWriter(AsmPrinter *Asm, const AccelTableBase &Contents,
+                         const DwarfDebug &DD,
+                         ArrayRef<std::unique_ptr<DwarfCompileUnit>> CompUnits);
 
   void emit() const;
 };
 } // namespace
 
-void AccelTableEmitter::emitHashes() const {
+void AccelTableWriter::emitHashes() const {
   uint64_t PrevHash = std::numeric_limits<uint64_t>::max();
   unsigned BucketIdx = 0;
   for (auto &Bucket : Contents.getBuckets()) {
@@ -254,7 +254,7 @@ void AccelTableEmitter::emitHashes() con
   }
 }
 
-void AccelTableEmitter::emitOffsets(const MCSymbol *Base) const {
+void AccelTableWriter::emitOffsets(const MCSymbol *Base) const {
   const auto &Buckets = Contents.getBuckets();
   uint64_t PrevHash = std::numeric_limits<uint64_t>::max();
   for (size_t i = 0, e = Buckets.size(); i < e; ++i) {
@@ -269,7 +269,7 @@ void AccelTableEmitter::emitOffsets(cons
   }
 }
 
-void AppleAccelTableEmitter::Header::emit(AsmPrinter *Asm) const {
+void AppleAccelTableWriter::Header::emit(AsmPrinter *Asm) const {
   Asm->OutStreamer->AddComment("Header Magic");
   Asm->emitInt32(Magic);
   Asm->OutStreamer->AddComment("Header Version");
@@ -284,7 +284,7 @@ void AppleAccelTableEmitter::Header::emi
   Asm->emitInt32(HeaderDataLength);
 }
 
-void AppleAccelTableEmitter::HeaderData::emit(AsmPrinter *Asm) const {
+void AppleAccelTableWriter::HeaderData::emit(AsmPrinter *Asm) const {
   Asm->OutStreamer->AddComment("HeaderData Die Offset Base");
   Asm->emitInt32(DieOffsetBase);
   Asm->OutStreamer->AddComment("HeaderData Atom Count");
@@ -298,7 +298,7 @@ void AppleAccelTableEmitter::HeaderData:
   }
 }
 
-void AppleAccelTableEmitter::emitBuckets() const {
+void AppleAccelTableWriter::emitBuckets() const {
   const auto &Buckets = Contents.getBuckets();
   unsigned index = 0;
   for (size_t i = 0, e = Buckets.size(); i < e; ++i) {
@@ -319,7 +319,7 @@ void AppleAccelTableEmitter::emitBuckets
   }
 }
 
-void AppleAccelTableEmitter::emitData() const {
+void AppleAccelTableWriter::emitData() const {
   const auto &Buckets = Contents.getBuckets();
   for (size_t i = 0, e = Buckets.size(); i < e; ++i) {
     uint64_t PrevHash = std::numeric_limits<uint64_t>::max();
@@ -345,7 +345,7 @@ void AppleAccelTableEmitter::emitData()
   }
 }
 
-void AppleAccelTableEmitter::emit() const {
+void AppleAccelTableWriter::emit() const {
   Header.emit(Asm);
   HeaderData.emit(Asm);
   emitBuckets();
@@ -354,8 +354,8 @@ void AppleAccelTableEmitter::emit() cons
   emitData();
 }
 
-void Dwarf5AccelTableEmitter::Header::emit(
-    const Dwarf5AccelTableEmitter &Ctx) const {
+void Dwarf5AccelTableWriter::Header::emit(
+    const Dwarf5AccelTableWriter &Ctx) const {
   assert(CompUnitCount > 0 && "Index must have at least one CU.");
 
   AsmPrinter *Asm = Ctx.Asm;
@@ -386,7 +386,7 @@ void Dwarf5AccelTableEmitter::Header::em
   Asm->OutStreamer->EmitBytes({AugmentationString, AugmentationStringSize});
 }
 
-DenseSet<uint32_t> Dwarf5AccelTableEmitter::getUniqueTags() const {
+DenseSet<uint32_t> Dwarf5AccelTableWriter::getUniqueTags() const {
   DenseSet<uint32_t> UniqueTags;
   for (auto &Bucket : Contents.getBuckets()) {
     for (auto *Hash : Bucket) {
@@ -400,8 +400,8 @@ DenseSet<uint32_t> Dwarf5AccelTableEmitt
   return UniqueTags;
 }
 
-SmallVector<Dwarf5AccelTableEmitter::AttributeEncoding, 2>
-Dwarf5AccelTableEmitter::getUniformAttributes() const {
+SmallVector<Dwarf5AccelTableWriter::AttributeEncoding, 2>
+Dwarf5AccelTableWriter::getUniformAttributes() const {
   SmallVector<AttributeEncoding, 2> UA;
   if (CompUnits.size() > 1) {
     size_t LargestCUIndex = CompUnits.size() - 1;
@@ -412,7 +412,7 @@ Dwarf5AccelTableEmitter::getUniformAttri
   return UA;
 }
 
-void Dwarf5AccelTableEmitter::emitCUList() const {
+void Dwarf5AccelTableWriter::emitCUList() const {
   for (const auto &CU : enumerate(CompUnits)) {
     assert(CU.index() == CU.value()->getUniqueID());
     Asm->OutStreamer->AddComment("Compilation unit " + Twine(CU.index()));
@@ -422,7 +422,7 @@ void Dwarf5AccelTableEmitter::emitCUList
   }
 }
 
-void Dwarf5AccelTableEmitter::emitBuckets() const {
+void Dwarf5AccelTableWriter::emitBuckets() const {
   uint32_t Index = 1;
   for (const auto &Bucket : enumerate(Contents.getBuckets())) {
     Asm->OutStreamer->AddComment("Bucket " + Twine(Bucket.index()));
@@ -431,7 +431,7 @@ void Dwarf5AccelTableEmitter::emitBucket
   }
 }
 
-void Dwarf5AccelTableEmitter::emitStringOffsets() const {
+void Dwarf5AccelTableWriter::emitStringOffsets() const {
   for (const auto &Bucket : enumerate(Contents.getBuckets())) {
     for (auto *Hash : Bucket.value()) {
       DwarfStringPoolEntryRef String = Hash->Name;
@@ -442,7 +442,7 @@ void Dwarf5AccelTableEmitter::emitString
   }
 }
 
-void Dwarf5AccelTableEmitter::emitAbbrevs() const {
+void Dwarf5AccelTableWriter::emitAbbrevs() const {
   Asm->OutStreamer->EmitLabel(AbbrevStart);
   for (const auto &Abbrev : Abbreviations) {
     Asm->OutStreamer->AddComment("Abbrev code");
@@ -462,7 +462,7 @@ void Dwarf5AccelTableEmitter::emitAbbrev
   Asm->OutStreamer->EmitLabel(AbbrevEnd);
 }
 
-void Dwarf5AccelTableEmitter::emitEntry(
+void Dwarf5AccelTableWriter::emitEntry(
     const DWARF5AccelTableData &Entry) const {
   auto AbbrevIt = Abbreviations.find(Entry.getDie().getTag());
   assert(AbbrevIt != Abbreviations.end() &&
@@ -488,7 +488,7 @@ void Dwarf5AccelTableEmitter::emitEntry(
   }
 }
 
-void Dwarf5AccelTableEmitter::emitData() const {
+void Dwarf5AccelTableWriter::emitData() const {
   Asm->OutStreamer->EmitLabel(EntryPool);
   for (auto &Bucket : Contents.getBuckets()) {
     for (auto *Hash : Bucket) {
@@ -502,10 +502,10 @@ void Dwarf5AccelTableEmitter::emitData()
   }
 }
 
-Dwarf5AccelTableEmitter::Dwarf5AccelTableEmitter(
+Dwarf5AccelTableWriter::Dwarf5AccelTableWriter(
     AsmPrinter *Asm, const AccelTableBase &Contents, const DwarfDebug &DD,
     ArrayRef<std::unique_ptr<DwarfCompileUnit>> CompUnits)
-    : AccelTableEmitter(Asm, Contents, false),
+    : AccelTableWriter(Asm, Contents, false),
       Header(CompUnits.size(), Contents.getBucketCount(),
              Contents.getUniqueNameCount()),
       DD(DD), CompUnits(CompUnits) {
@@ -517,7 +517,7 @@ Dwarf5AccelTableEmitter::Dwarf5AccelTabl
     Abbreviations.try_emplace(Tag, UniformAttributes);
 }
 
-void Dwarf5AccelTableEmitter::emit() const {
+void Dwarf5AccelTableWriter::emit() const {
   Header.emit(*this);
   emitCUList();
   emitBuckets();
@@ -534,14 +534,14 @@ void llvm::emitAppleAccelTableImpl(AsmPr
                                    StringRef Prefix, const MCSymbol *SecBegin,
                                    ArrayRef<AppleAccelTableData::Atom> Atoms) {
   Contents.finalize(Asm, Prefix);
-  AppleAccelTableEmitter(Asm, Contents, Atoms, SecBegin).emit();
+  AppleAccelTableWriter(Asm, Contents, Atoms, SecBegin).emit();
 }
 
 void llvm::emitDWARF5AccelTable(
     AsmPrinter *Asm, AccelTable<DWARF5AccelTableData> &Contents,
     const DwarfDebug &DD, ArrayRef<std::unique_ptr<DwarfCompileUnit>> CUs) {
   Contents.finalize(Asm, "names");
-  Dwarf5AccelTableEmitter(Asm, Contents, DD, CUs).emit();
+  Dwarf5AccelTableWriter(Asm, Contents, DD, CUs).emit();
 }
 
 void AppleAccelTableOffsetData::emit(AsmPrinter *Asm) const {
@@ -592,7 +592,7 @@ const SmallVector<AppleAccelTableData::A
 #endif
 
 #ifndef NDEBUG
-void AppleAccelTableEmitter::Header::print(raw_ostream &OS) const {
+void AppleAccelTableWriter::Header::print(raw_ostream &OS) const {
   OS << "Magic: " << format("0x%x", Magic) << "\n"
      << "Version: " << Version << "\n"
      << "Hash Function: " << HashFunction << "\n"
@@ -605,13 +605,13 @@ void AppleAccelTableData::Atom::print(ra
      << "Form: " << dwarf::FormEncodingString(Form) << "\n";
 }
 
-void AppleAccelTableEmitter::HeaderData::print(raw_ostream &OS) const {
+void AppleAccelTableWriter::HeaderData::print(raw_ostream &OS) const {
   OS << "DIE Offset Base: " << DieOffsetBase << "\n";
   for (auto Atom : Atoms)
     Atom.print(OS);
 }
 
-void AppleAccelTableEmitter::print(raw_ostream &OS) const {
+void AppleAccelTableWriter::print(raw_ostream &OS) const {
   Header.print(OS);
   HeaderData.print(OS);
   Contents.print(OS);




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