[PATCH] D48765: [X86] The TEST instruction is eliminated when BSF/TZCNT is used

[Ivan Kulagin via Phabricator via llvm-commits]

ikulagin updated this revision to Diff 154488.
ikulagin added a comment.

I have fixed this pattern as a DAG combining on the CMOV node before instruction selection. 
The following DAG combinations are performed:
(CMOV (ADD (CTTZ X), C), C-1, (X != 0)) -> (ADD (CMOV (CTTZ X), -1, (X != 0)), C)
(CMOV C-1, (ADD (CTTZ X), C), (X == 0)) -> (ADD (CMOV C-1, (CTTZ X), (X == 0)), C)


Repository:
  rL LLVM

https://reviews.llvm.org/D48765

Files:
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86InstrInfo.cpp
  test/CodeGen/X86/dagcombine-select.ll

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