[PATCH] D39386: [Power9] Allow gpr callee saved spills in prologue to vector registers rather than stack
Zaara Syeda via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 5 11:20:52 PDT 2018
syzaara updated this revision to Diff 154275.
https://reviews.llvm.org/D39386
Files:
include/llvm/CodeGen/MachineFrameInfo.h
lib/CodeGen/PrologEpilogInserter.cpp
lib/Target/PowerPC/PPCFrameLowering.cpp
lib/Target/PowerPC/PPCFrameLowering.h
test/CodeGen/PowerPC/prolog_vec_spills.ll
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