[llvm] r336339 - [AMDGPU] Add VALU to V_INTERP Instructions

Ryan Taylor via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 5 05:02:07 PDT 2018


Author: rtayl
Date: Thu Jul  5 05:02:07 2018
New Revision: 336339

URL: http://llvm.org/viewvc/llvm-project?rev=336339&view=rev
Log:
[AMDGPU] Add VALU to V_INTERP Instructions

Wait states are not properly being inserted after buffer_store for v_interp instructions.

Add VALU to V_INTERP instructions so that the GCNHazardRecognizer can
check and insert the appropriate wait states when needed.

Differential Revision: https://reviews.llvm.org/D48772

Change-Id: Id540c9b074fc69b5c1de6b182276aa089c74aa64

Added:
    llvm/trunk/test/CodeGen/AMDGPU/hazard-buffer-store-v-interp.mir
Modified:
    llvm/trunk/lib/Target/AMDGPU/SIInstrFormats.td

Modified: llvm/trunk/lib/Target/AMDGPU/SIInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIInstrFormats.td?rev=336339&r1=336338&r2=336339&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIInstrFormats.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIInstrFormats.td Thu Jul  5 05:02:07 2018
@@ -319,6 +319,7 @@ class VINTRPCommon <dag outs, dag ins, s
   let mayLoad = 0;
   let mayStore = 0;
   let hasSideEffects = 0;
+  let VALU = 1;
 }
 
 class EXPCommon<dag outs, dag ins, string asm, list<dag> pattern> :

Added: llvm/trunk/test/CodeGen/AMDGPU/hazard-buffer-store-v-interp.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/hazard-buffer-store-v-interp.mir?rev=336339&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/hazard-buffer-store-v-interp.mir (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/hazard-buffer-store-v-interp.mir Thu Jul  5 05:02:07 2018
@@ -0,0 +1,19 @@
+# RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefix=GCN -check-prefix=VI %s
+# RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefix=GCN -check-prefix=GFX9 %s
+
+# GCN-LABEL: name: hazard_buffer_store_v_interp
+# GCN:    bb.0.entry:
+# GCN-NEXT:    BUFFER_STORE_DWORDX4_OFFSET_exact
+# GCN-NEXT:    S_NOP
+# GCN-NEXT:    V_INTERP_P1_F32
+
+name:            hazard_buffer_store_v_interp
+body:             |
+  bb.0.entry:
+    liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $vgpr0, $vgpr1, $vgpr7, $vgpr8, $vgpr9, $vgpr10
+  
+    BUFFER_STORE_DWORDX4_OFFSET_exact killed $vgpr7_vgpr8_vgpr9_vgpr10, $sgpr4_sgpr5_sgpr6_sgpr7, 0, 96, 0, 0, 0, implicit $exec
+    $vgpr7 = V_INTERP_P1_F32 $vgpr0, 0, 0, implicit $m0, implicit $exec
+    S_ENDPGM
+
+...




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