[PATCH] D48308: [Power9] Ensure float128 in non-homogenous aggregates are passed via VSX registers

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai added inline comments.


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Comment at: lib/Target/PowerPC/PPCISelLowering.cpp:7662
+  if (!EnableQuadPrecision ||
+      (Op->getValueType(0) != MVT::f128 ) ||
+      (Op->getOperand(0).getOpcode() != ISD::BUILD_PAIR) ||
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lei wrote:
> nemanjai wrote:
> > A `bitcast` produces a single result, why `getValueType(0)` vs. just `getValueType()`?
> `Op.getValueType() == Op->getValueType(0)`.
> I can update to use `Op.getValueType()` 
Correct, the two are equivalent. But the former calls a member function of `SDValue` directly while the latter calls `operator->()` and calls a member function of the containing `SDNode`.


Repository:
  rL LLVM

https://reviews.llvm.org/D48308