[PATCH] D48308: [Power9] Ensure float128 in non-homogenous aggregates are passed via VSX registers

Lei Huang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 4 22:54:25 PDT 2018


lei marked 2 inline comments as done.
lei added inline comments.


================
Comment at: lib/Target/PowerPC/PPCISelLowering.cpp:7662
+  if (!EnableQuadPrecision ||
+      (Op->getValueType(0) != MVT::f128 ) ||
+      (Op->getOperand(0).getOpcode() != ISD::BUILD_PAIR) ||
----------------
nemanjai wrote:
> A `bitcast` produces a single result, why `getValueType(0)` vs. just `getValueType()`?
`Op.getValueType() == Op->getValueType(0)`.
I can update to use `Op.getValueType()` 


https://reviews.llvm.org/D48308





More information about the llvm-commits mailing list